[llvm] 6377388 - [AArch64] Fix AArch64::dsub's size
Jon Roelofs via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 13 18:07:58 PDT 2021
Author: Jon Roelofs
Date: 2021-07-13T18:06:31-07:00
New Revision: 6377388c32ffc1f5c054a813d0bc81ac118108af
URL: https://github.com/llvm/llvm-project/commit/6377388c32ffc1f5c054a813d0bc81ac118108af
DIFF: https://github.com/llvm/llvm-project/commit/6377388c32ffc1f5c054a813d0bc81ac118108af.diff
LOG: [AArch64] Fix AArch64::dsub's size
Added:
Modified:
llvm/lib/Target/AArch64/AArch64RegisterInfo.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.td b/llvm/lib/Target/AArch64/AArch64RegisterInfo.td
index 28d1988b8a5f..25cacbf09c8b 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.td
@@ -24,7 +24,7 @@ let Namespace = "AArch64" in {
def bsub : SubRegIndex<8>;
def hsub : SubRegIndex<16>;
def ssub : SubRegIndex<32>;
- def dsub : SubRegIndex<32>;
+ def dsub : SubRegIndex<64>;
def sube32 : SubRegIndex<32>;
def subo32 : SubRegIndex<32>;
def qhisub : SubRegIndex<64>;
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