[PATCH] D105879: Refine logic of MaskedElementsAreZero

[Xiang Zhang via Phabricator via llvm-commits]

xiangzhangllvm added a comment.

Yes, I change here because we got a runfail at a project. Let me commit the small reproduce a little later.



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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2450
-  APInt DemandedBits = APInt::getAllOnesValue(BitWidth);
-  return MaskedValueIsZero(Op, DemandedBits, DemandedElts, Depth);
 }
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> it just analyses the common bits of all the vector elements specified in the DemandedElts mask
Thanks for your explain, in fact, I read the computeKnownBits  code yesterday, it makes me a lot of puzzle. I thought here the DemandedBits should have the same BitWidth with Op (e.g.  128 for V16xi8)


Let me take a example:
So, if the Op is type V16xi8, and the DemandedElts is 0x2222 (16 bits, demanded index is 1, 5, 9, 13), you mean computeKnownBits will return the common zeros/ones of Op's elements  with index 1, 5, 9, 13 ?  ( zeros/ones = element1 & element5 & element9 & element13).


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105879/new/

https://reviews.llvm.org/D105879