[llvm] 3e5cff1 - [Tests] Fix test broken by: 43c7ca8e4963 [AArch64][GlobalISel] Legalize store <2 x i16>

[Jon Roelofs via llvm-commits]

Author: Jon Roelofs
Date: 2021-07-13T11:36:36-07:00
New Revision: 3e5cff19fdae2515f87c08dc8b0e483751165153

URL: https://github.com/llvm/llvm-project/commit/3e5cff19fdae2515f87c08dc8b0e483751165153
DIFF: https://github.com/llvm/llvm-project/commit/3e5cff19fdae2515f87c08dc8b0e483751165153.diff

LOG: [Tests] Fix test broken by: 43c7ca8e4963 [AArch64][GlobalISel] Legalize store <2 x i16>

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/arm64-rev.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/arm64-rev.ll b/llvm/test/CodeGen/AArch64/arm64-rev.ll
index b9971a965895..0879184c507a 100644
--- a/llvm/test/CodeGen/AArch64/arm64-rev.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-rev.ll
@@ -544,8 +544,8 @@ define void @test_vrev64(<4 x i16>* nocapture %source, <2 x i16>* nocapture %dst
 ; GISEL:       // %bb.0: // %entry
 ; GISEL-NEXT:    ldr q0, [x0]
 ; GISEL-NEXT:    add x8, x1, #2 // =2
-; GISEL-NEXT:    st1.h { v0 }[5], [x8]
 ; GISEL-NEXT:    st1.h { v0 }[6], [x1]
+; GISEL-NEXT:    st1.h { v0 }[5], [x8]
 ; GISEL-NEXT:    ret
 entry:
   %0 = bitcast <4 x i16>* %source to <8 x i16>*