[PATCH] D88663: [AArch64] Use TargetRegisterClass::hasSubClassEq in tryToFindRegisterToRename

[Cullen Rhodes via Phabricator via llvm-commits]

c-rhodes updated this revision to Diff 358294.
c-rhodes edited the summary of this revision.
c-rhodes added a comment.

- Moved opcode whitelist to function.
- Use `getMinimalPhysRegClass` for implicit-def operand when `getRegClassConstraint` returns NULL.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88663/new/

https://reviews.llvm.org/D88663

Files:
  llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  llvm/test/CodeGen/AArch64/arm64-abi-varargs.ll
  llvm/test/CodeGen/AArch64/machine-outliner.ll
  llvm/test/CodeGen/AArch64/stp-opt-with-renaming-debug.mir
  llvm/test/CodeGen/AArch64/stp-opt-with-renaming-reserved-regs.mir
  llvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir

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