[llvm] b205f2b - [AMDGPU] Handle s_branch to another section.

Hafiz Abid Qadeer via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 13 04:21:14 PDT 2021


Author: Hafiz Abid Qadeer
Date: 2021-07-13T12:17:47+01:00
New Revision: b205f2bb8938447638e9ddc4ee1f6b82caeb1ad3

URL: https://github.com/llvm/llvm-project/commit/b205f2bb8938447638e9ddc4ee1f6b82caeb1ad3
DIFF: https://github.com/llvm/llvm-project/commit/b205f2bb8938447638e9ddc4ee1f6b82caeb1ad3.diff

LOG: [AMDGPU] Handle s_branch to another section.

Currently, if target of s_branch instruction is in another section, it will fail with the error of undefined label.  Although in this case, the label is not undefined but present in another section. This patch tries to handle this issue. So while handling fixup_si_sopp_br fixup in getRelocType, if the target label is undefined we issue an error as before. If it is defined, a new relocation type R_AMDGPU_REL16 is returned.

This issue has been reported in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100181 and https://bugs.llvm.org/show_bug.cgi?id=45887. Before https://reviews.llvm.org/D79943, we used to get an crash for this scenario. The crash is fixed now but the we still get an undefined label error.  Jumps to other section can arise with hold/cold splitting.

A patch to handle the relocation in lld will follow shortly.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D105760

Added: 
    

Modified: 
    llvm/docs/AMDGPUUsage.rst
    llvm/include/llvm/BinaryFormat/ELFRelocs/AMDGPU.def
    llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
    llvm/test/MC/AMDGPU/reloc.s
    llvm/test/tools/llvm-readobj/ELF/reloc-types-elf-amdgpu.test

Removed: 
    


################################################################################
diff  --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index d78f217759fe8..c84583233ce2f 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -1574,6 +1574,7 @@ The following relocation types are supported:
      ``R_AMDGPU_REL32_HI``      Static  11     ``word32``  (S + A - P) >> 32
      *reserved*                         12
      ``R_AMDGPU_RELATIVE64``    Dynamic 13     ``word64``  B + A
+     ``R_AMDGPU_REL16``         Static  14     ``word16``  ((S + A - P) - 4) / 4
      ========================== ======= =====  ==========  ==============================
 
 ``R_AMDGPU_ABS32_LO`` and ``R_AMDGPU_ABS32_HI`` are only supported by

diff  --git a/llvm/include/llvm/BinaryFormat/ELFRelocs/AMDGPU.def b/llvm/include/llvm/BinaryFormat/ELFRelocs/AMDGPU.def
index 00b19c4161d08..0ff7b4c766cc1 100644
--- a/llvm/include/llvm/BinaryFormat/ELFRelocs/AMDGPU.def
+++ b/llvm/include/llvm/BinaryFormat/ELFRelocs/AMDGPU.def
@@ -15,3 +15,4 @@ ELF_RELOC(R_AMDGPU_GOTPCREL32_HI,  9)
 ELF_RELOC(R_AMDGPU_REL32_LO,      10)
 ELF_RELOC(R_AMDGPU_REL32_HI,      11)
 ELF_RELOC(R_AMDGPU_RELATIVE64,    13)
+ELF_RELOC(R_AMDGPU_REL16,         14)

diff  --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
index 426648d19d55a..bb2c298c28503 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
@@ -80,9 +80,12 @@ unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
     const auto *SymA = Target.getSymA();
     assert(SymA);
 
-    Ctx.reportError(Fixup.getLoc(),
-                    Twine("undefined label '") + SymA->getSymbol().getName() + "'");
-    return ELF::R_AMDGPU_NONE;
+    if (SymA->getSymbol().isUndefined()) {
+      Ctx.reportError(Fixup.getLoc(), Twine("undefined label '") +
+                                          SymA->getSymbol().getName() + "'");
+      return ELF::R_AMDGPU_NONE;
+    }
+    return ELF::R_AMDGPU_REL16;
   }
 
   llvm_unreachable("unhandled relocation type");

diff  --git a/llvm/test/MC/AMDGPU/reloc.s b/llvm/test/MC/AMDGPU/reloc.s
index 8fcaf78f44567..cdb2f154459fa 100644
--- a/llvm/test/MC/AMDGPU/reloc.s
+++ b/llvm/test/MC/AMDGPU/reloc.s
@@ -9,6 +9,7 @@
 // CHECK: R_AMDGPU_GOTPCREL32_HI global_var2
 // CHECK: R_AMDGPU_REL32_LO global_var3
 // CHECK: R_AMDGPU_REL32_HI global_var4
+// CHECK: R_AMDGPU_REL16 .text.unlikely
 // CHECK: R_AMDGPU_ABS32 var
 // CHECK: }
 // CHECK: .rel.data {
@@ -25,6 +26,11 @@ kernel:
   s_mov_b32 s4, global_var2 at gotpcrel32@hi
   s_mov_b32 s5, global_var3 at rel32@lo
   s_mov_b32 s6, global_var4 at rel32@hi
+  s_branch cold
+
+  .section .text.unlikely
+cold:
+  s_add_i32 s15, s15, 1
 
 .globl global_var0
 .globl global_var1

diff  --git a/llvm/test/tools/llvm-readobj/ELF/reloc-types-elf-amdgpu.test b/llvm/test/tools/llvm-readobj/ELF/reloc-types-elf-amdgpu.test
index 30ba07b939627..e8e4b57092a48 100644
--- a/llvm/test/tools/llvm-readobj/ELF/reloc-types-elf-amdgpu.test
+++ b/llvm/test/tools/llvm-readobj/ELF/reloc-types-elf-amdgpu.test
@@ -18,6 +18,7 @@
 # CHECK-NEXT:   0x0 R_AMDGPU_REL32_LO       - 0x0
 # CHECK-NEXT:   0x0 R_AMDGPU_REL32_HI       - 0x0
 # CHECK-NEXT:   0x0 R_AMDGPU_RELATIVE64     - 0x0
+# CHECK-NEXT:   0x0 R_AMDGPU_REL16          - 0x0
 # CHECK-NEXT: }
 
 !ELF
@@ -43,3 +44,4 @@ Sections:
       - Type: R_AMDGPU_REL32_LO
       - Type: R_AMDGPU_REL32_HI
       - Type: R_AMDGPU_RELATIVE64
+      - Type: R_AMDGPU_REL16


        


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