[llvm] 7802f62 - AArch64: use 4-byte slots for arm64_32 pointers in a tail call
Tim Northover via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 13 03:10:11 PDT 2021
Author: Tim Northover
Date: 2021-07-13T11:08:59+01:00
New Revision: 7802f62b3f2c18aa689e315460539736e1c81974
URL: https://github.com/llvm/llvm-project/commit/7802f62b3f2c18aa689e315460539736e1c81974
DIFF: https://github.com/llvm/llvm-project/commit/7802f62b3f2c18aa689e315460539736e1c81974.diff
LOG: AArch64: use 4-byte slots for arm64_32 pointers in a tail call
Added:
llvm/test/CodeGen/AArch64/swifttail-arm64_32.ll
Modified:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 662a1d458605f..7bc73a9b8fce9 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -5973,7 +5973,8 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
// common case. It should also work for fundamental types too.
uint32_t BEAlign = 0;
unsigned OpSize;
- if (VA.getLocInfo() == CCValAssign::Indirect)
+ if (VA.getLocInfo() == CCValAssign::Indirect ||
+ VA.getLocInfo() == CCValAssign::Trunc)
OpSize = VA.getLocVT().getFixedSizeInBits();
else
OpSize = Flags.isByVal() ? Flags.getByValSize() * 8
diff --git a/llvm/test/CodeGen/AArch64/swifttail-arm64_32.ll b/llvm/test/CodeGen/AArch64/swifttail-arm64_32.ll
new file mode 100644
index 0000000000000..371eaedcf0d57
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/swifttail-arm64_32.ll
@@ -0,0 +1,16 @@
+; RUN: llc -mtriple=arm64_32-apple-watchos %s -o - | FileCheck %s
+
+declare swifttailcc void @pointer_align_callee([8 x i64], i32, i32, i32, i8*)
+define swifttailcc void @pointer_align_caller(i8* swiftasync %as, i8* %in) "frame-pointer"="all" {
+; CHECK-LABEL: pointer_align_caller:
+; CHECK: sub sp, sp, #48
+; CHECK: mov [[TWO:w[0-9]+]], #2
+; CHECK: mov [[ZERO_ONE:x[0-9]+]], #4294967296
+; CHECK: stp [[TWO]], w0, [x29, #24]
+; CHECK: str [[ZERO_ONE]], [x29, #16]
+; CHECK: add sp, sp, #32
+; CHECK: b _pointer_align_callee
+ alloca i32
+ musttail call swifttailcc void @pointer_align_callee([8 x i64] undef, i32 0, i32 1, i32 2, i8* %in)
+ ret void
+}
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