[llvm] d7d9c57 - [NFC] Edit the comment in M68kInstrInfo::ExpandMOVSZX_RM

[hyeongyu kim via llvm-commits]

Author: hyeongyu kim
Date: 2021-07-13T15:10:24+09:00
New Revision: d7d9c577ed33ab6b82eceb01bc978f2460f038f4

URL: https://github.com/llvm/llvm-project/commit/d7d9c577ed33ab6b82eceb01bc978f2460f038f4
DIFF: https://github.com/llvm/llvm-project/commit/d7d9c577ed33ab6b82eceb01bc978f2460f038f4.diff

LOG: [NFC] Edit the comment in M68kInstrInfo::ExpandMOVSZX_RM

Added: 
    

Modified: 
    llvm/lib/Target/M68k/M68kInstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/M68k/M68kInstrInfo.cpp b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
index 67b3a9f12c90..0eddd8ce5f4c 100644
--- a/llvm/lib/Target/M68k/M68kInstrInfo.cpp
+++ b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
@@ -442,8 +442,8 @@ bool M68kInstrInfo::ExpandMOVSZX_RM(MachineInstrBuilder &MIB, bool IsSigned,
   // We need the subreg of Dst to make instruction verifier happy because the
   // real machine instruction consumes and produces values of the same size and
   // the registers the will be used here fall into 
diff erent classes and this
-  // makes IV cry. We could of course use bigger operation but this will put
-  // some pressure on cache and memory so no.
+  // makes IV cry. We could use a bigger operation, but this will put some
+  // pressure on cache and memory, so no.
   unsigned SubDst =
       RI.getSubReg(Dst, MVTSrc == MVT::i8 ? M68k::MxSubRegIndex8Lo
                                           : M68k::MxSubRegIndex16Lo);