[PATCH] D105709: [AMDGPU][GlobalISel] Insert an and with exec before s_cbranch_vccnz if necessary
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 12 15:26:36 PDT 2021
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:2496
+ const unsigned CondDefOpc = MRI->getUniqueVRegDef(CondReg)->getOpcode();
+ if (CondDefOpc != AMDGPU::G_ICMP && CondDefOpc != AMDGPU::G_FCMP) {
+ const bool Is64 = STI.isWave64();
----------------
foad wrote:
> arsenm wrote:
> > This isn't the precise condition. It should also cover class intrinsics and maybe a few other cases. I thought we had an is known vector bool helper somewhere?
> >
> For SelectionDAG we have isBoolSGPR. I don't know of anything similar for GlobalISel.
We should have the equivalent
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D105709/new/
https://reviews.llvm.org/D105709
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