[PATCH] D105192: [AMDGPU] Optimize VGPR LiveRange in waterfall loops

Sebastian Neubauer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 12 02:54:29 PDT 2021


sebastian-ne added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/indirect-call.ll:649
+; allocator is not able to do that because the return value clashes with the liverange of an
+; IMPLICIT_DEF of the argument.
+define i32 @test_indirect_call_vgpr_ptr_arg_and_return(i32 %i, i32(i32)* %fptr) {
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ruiling wrote:
> thanks for the test, I see the issue, will take further look later.
I think the issue is that IMPLICIT_DEF does create a live range, but it shouldn’t. Even the language reference mentions that `undef`s don’t have a live range.
There are already a few workarounds in LLVM to get around this. E.g. the RegisterCoalescer keeps track of and ignores IMPLICIT_DEFs, also the `undef` MachineOperand flag was probably introduced because of these live ranges (commit 0dc101b897090e37e6e6eb239d96aec6d368b43f).

However, I’m not sure if removing live ranges of IMPLICIT_DEFs is the right thing to do. I guess it would mean that registers are live-in in one block, but not live-out in one of the predecessors—because they are IMPLICIT_DEF in the predecessor. And I don’t know about what implications that has.


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https://reviews.llvm.org/D105192



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