[PATCH] D105800: [AMDGPU] Tidy SReg/SGPR definitions using template class

[Carl Ritson via Phabricator via llvm-commits]

critson created this revision.
critson added reviewers: arsenm, rampitec, foad.
Herald added subscribers: kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
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Herald added subscribers: llvm-commits, wdng.
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Use a multiclass to consistently define SReg/SGPR/TTMP register
classes.  When there is no TTMP class defined, then mark the
SReg class as allocatable.

Always marking SReg as allocatable fixes register allocation
failures seen with 192b types.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D105800

Files:
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/lib/Target/AMDGPU/SIRegisterInfo.td

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