[llvm] 47aeeff - [GlobalISel] Use GCDTy when extracting GCD ty from leftover regs in insertParts
Jessica Paquette via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 9 14:16:04 PDT 2021
Author: Jessica Paquette
Date: 2021-07-09T14:15:44-07:00
New Revision: 47aeeffc8fb45c4926128657dd15eaa87edab647
URL: https://github.com/llvm/llvm-project/commit/47aeeffc8fb45c4926128657dd15eaa87edab647
DIFF: https://github.com/llvm/llvm-project/commit/47aeeffc8fb45c4926128657dd15eaa87edab647.diff
LOG: [GlobalISel] Use GCDTy when extracting GCD ty from leftover regs in insertParts
`LegalizerHelper::insertParts` uses `extractGCDType` on registers split into
a desired type and a smaller leftover type. This is used to populate a list
of registers. Each register in the list will have the same type as returned by
`extractGCDType`.
If we have
- `ResultTy` = s792
- `PartTy` = s64
- `LeftoverTy` = s24
When we call `extractGCDType`, we'll end up with two different types appended
to the list:
Part: gcd(792, 64, 24) => s8
Leftover: gcd(792, 24, 24) => s24
When this happens, we'll hit an assert while trying to build a G_MERGE_VALUES.
This patch changes the code for the leftover type so that we reuse the GCD from
the desired type.
e.g.
Leftover: gcd(792, 8, 24) => s8
https://llvm.godbolt.org/z/137Kqxj6j
Differential Revision: https://reviews.llvm.org/D105674
Added:
Modified:
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 3fb50561de0da..66cd53ba88007 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -223,13 +223,9 @@ void LegalizerHelper::insertParts(Register DstReg,
}
SmallVector<Register> GCDRegs;
- LLT GCDTy;
- for (Register PartReg : PartRegs)
- GCDTy = extractGCDType(GCDRegs, ResultTy, LeftoverTy, PartReg);
-
- for (Register PartReg : LeftoverRegs)
- extractGCDType(GCDRegs, ResultTy, LeftoverTy, PartReg);
-
+ LLT GCDTy = getGCDType(getGCDType(ResultTy, LeftoverTy), PartTy);
+ for (auto PartReg : concat<const Register>(PartRegs, LeftoverRegs))
+ extractGCDType(GCDRegs, GCDTy, PartReg);
LLT ResultLCMTy = buildLCMMergePieces(ResultTy, LeftoverTy, GCDTy, GCDRegs);
buildWidenedRemergeToDst(DstReg, ResultLCMTy, GCDRegs);
}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
index 94bef416af23d..a907564d4b8a7 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
@@ -1,31 +1,11 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -O0 -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -O0 -mtriple aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
---- |
- target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
- target triple = "aarch64--"
- define void @test_constant() {
- entry:
- ret void
- }
- define void @test_fconstant() {
- entry:
- ret void
- }
-...
-
----
name: test_constant
registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
- - { id: 3, class: _ }
- - { id: 4, class: _ }
- - { id: 5, class: _ }
body: |
- bb.0.entry:
-
+ bb.0:
+ liveins: $x0
; CHECK-LABEL: name: test_constant
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: $w0 = COPY [[C]](s32)
@@ -39,32 +19,28 @@ body: |
; CHECK: $x0 = COPY [[C3]](s64)
; CHECK: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: $x0 = COPY [[C4]](s64)
- %0(s1) = G_CONSTANT i1 0
+ %0:_(s1) = G_CONSTANT i1 0
%6:_(s32) = G_ANYEXT %0
$w0 = COPY %6
- %1(s8) = G_CONSTANT i8 42
+ %1:_(s8) = G_CONSTANT i8 42
%7:_(s32) = G_ANYEXT %1
$w0 = COPY %7
- %2(s16) = G_CONSTANT i16 65535
+ %2:_(s16) = G_CONSTANT i16 65535
%8:_(s32) = G_ANYEXT %2
$w0 = COPY %8
- %3(s32) = G_CONSTANT i32 -1
+ %3:_(s32) = G_CONSTANT i32 -1
$w0 = COPY %3
- %4(s64) = G_CONSTANT i64 1
+ %4:_(s64) = G_CONSTANT i64 1
$x0 = COPY %4
- %5(s64) = G_CONSTANT i64 0
+ %5:_(s64) = G_CONSTANT i64 0
$x0 = COPY %5
...
---
name: test_fconstant
-registers:
- - { id: 0, class: _ }
- - { id: 1, class: _ }
- - { id: 2, class: _ }
body: |
- bb.0.entry:
-
+ bb.0:
+ liveins: $x0
; CHECK-LABEL: name: test_fconstant
; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
; CHECK: $w0 = COPY [[C]](s32)
@@ -74,11 +50,76 @@ body: |
; CHECK: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[C2]](s32)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
; CHECK: $w0 = COPY [[ANYEXT]](s32)
- %0(s32) = G_FCONSTANT float 1.0
+ %0:_(s32) = G_FCONSTANT float 1.0
$w0 = COPY %0
- %1(s64) = G_FCONSTANT double 2.0
+ %1:_(s64) = G_FCONSTANT double 2.0
$x0 = COPY %1
- %2(s16) = G_FCONSTANT half 0.0
+ %2:_(s16) = G_FCONSTANT half 0.0
%3:_(s32) = G_ANYEXT %2
$w0 = COPY %3
...
+
+---
+name: s792
+registers:
+body: |
+ bb.0:
+ liveins: $x0
+ ; CHECK-LABEL: name: s792
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV8:%[0-9]+]]:_(s8), [[UV9:%[0-9]+]]:_(s8), [[UV10:%[0-9]+]]:_(s8), [[UV11:%[0-9]+]]:_(s8), [[UV12:%[0-9]+]]:_(s8), [[UV13:%[0-9]+]]:_(s8), [[UV14:%[0-9]+]]:_(s8), [[UV15:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV16:%[0-9]+]]:_(s8), [[UV17:%[0-9]+]]:_(s8), [[UV18:%[0-9]+]]:_(s8), [[UV19:%[0-9]+]]:_(s8), [[UV20:%[0-9]+]]:_(s8), [[UV21:%[0-9]+]]:_(s8), [[UV22:%[0-9]+]]:_(s8), [[UV23:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV24:%[0-9]+]]:_(s8), [[UV25:%[0-9]+]]:_(s8), [[UV26:%[0-9]+]]:_(s8), [[UV27:%[0-9]+]]:_(s8), [[UV28:%[0-9]+]]:_(s8), [[UV29:%[0-9]+]]:_(s8), [[UV30:%[0-9]+]]:_(s8), [[UV31:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV32:%[0-9]+]]:_(s8), [[UV33:%[0-9]+]]:_(s8), [[UV34:%[0-9]+]]:_(s8), [[UV35:%[0-9]+]]:_(s8), [[UV36:%[0-9]+]]:_(s8), [[UV37:%[0-9]+]]:_(s8), [[UV38:%[0-9]+]]:_(s8), [[UV39:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV40:%[0-9]+]]:_(s8), [[UV41:%[0-9]+]]:_(s8), [[UV42:%[0-9]+]]:_(s8), [[UV43:%[0-9]+]]:_(s8), [[UV44:%[0-9]+]]:_(s8), [[UV45:%[0-9]+]]:_(s8), [[UV46:%[0-9]+]]:_(s8), [[UV47:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV48:%[0-9]+]]:_(s8), [[UV49:%[0-9]+]]:_(s8), [[UV50:%[0-9]+]]:_(s8), [[UV51:%[0-9]+]]:_(s8), [[UV52:%[0-9]+]]:_(s8), [[UV53:%[0-9]+]]:_(s8), [[UV54:%[0-9]+]]:_(s8), [[UV55:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV56:%[0-9]+]]:_(s8), [[UV57:%[0-9]+]]:_(s8), [[UV58:%[0-9]+]]:_(s8), [[UV59:%[0-9]+]]:_(s8), [[UV60:%[0-9]+]]:_(s8), [[UV61:%[0-9]+]]:_(s8), [[UV62:%[0-9]+]]:_(s8), [[UV63:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV64:%[0-9]+]]:_(s8), [[UV65:%[0-9]+]]:_(s8), [[UV66:%[0-9]+]]:_(s8), [[UV67:%[0-9]+]]:_(s8), [[UV68:%[0-9]+]]:_(s8), [[UV69:%[0-9]+]]:_(s8), [[UV70:%[0-9]+]]:_(s8), [[UV71:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV72:%[0-9]+]]:_(s8), [[UV73:%[0-9]+]]:_(s8), [[UV74:%[0-9]+]]:_(s8), [[UV75:%[0-9]+]]:_(s8), [[UV76:%[0-9]+]]:_(s8), [[UV77:%[0-9]+]]:_(s8), [[UV78:%[0-9]+]]:_(s8), [[UV79:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV80:%[0-9]+]]:_(s8), [[UV81:%[0-9]+]]:_(s8), [[UV82:%[0-9]+]]:_(s8), [[UV83:%[0-9]+]]:_(s8), [[UV84:%[0-9]+]]:_(s8), [[UV85:%[0-9]+]]:_(s8), [[UV86:%[0-9]+]]:_(s8), [[UV87:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV88:%[0-9]+]]:_(s8), [[UV89:%[0-9]+]]:_(s8), [[UV90:%[0-9]+]]:_(s8), [[UV91:%[0-9]+]]:_(s8), [[UV92:%[0-9]+]]:_(s8), [[UV93:%[0-9]+]]:_(s8), [[UV94:%[0-9]+]]:_(s8), [[UV95:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C]](s64)
+ ; CHECK: [[UV96:%[0-9]+]]:_(s8), [[UV97:%[0-9]+]]:_(s8), [[UV98:%[0-9]+]]:_(s8), [[UV99:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[C1]](s32)
+ ; CHECK: [[MV:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV]](s8), [[UV1]](s8), [[UV2]](s8)
+ ; CHECK: [[MV1:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV3]](s8), [[UV4]](s8), [[UV5]](s8)
+ ; CHECK: [[MV2:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV6]](s8), [[UV7]](s8), [[UV8]](s8)
+ ; CHECK: [[MV3:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV9]](s8), [[UV10]](s8), [[UV11]](s8)
+ ; CHECK: [[MV4:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV12]](s8), [[UV13]](s8), [[UV14]](s8)
+ ; CHECK: [[MV5:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV15]](s8), [[UV16]](s8), [[UV17]](s8)
+ ; CHECK: [[MV6:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV18]](s8), [[UV19]](s8), [[UV20]](s8)
+ ; CHECK: [[MV7:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV21]](s8), [[UV22]](s8), [[UV23]](s8)
+ ; CHECK: [[MV8:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV24]](s8), [[UV25]](s8), [[UV26]](s8)
+ ; CHECK: [[MV9:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV27]](s8), [[UV28]](s8), [[UV29]](s8)
+ ; CHECK: [[MV10:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV30]](s8), [[UV31]](s8), [[UV32]](s8)
+ ; CHECK: [[MV11:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV33]](s8), [[UV34]](s8), [[UV35]](s8)
+ ; CHECK: [[MV12:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV36]](s8), [[UV37]](s8), [[UV38]](s8)
+ ; CHECK: [[MV13:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV39]](s8), [[UV40]](s8), [[UV41]](s8)
+ ; CHECK: [[MV14:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV42]](s8), [[UV43]](s8), [[UV44]](s8)
+ ; CHECK: [[MV15:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV45]](s8), [[UV46]](s8), [[UV47]](s8)
+ ; CHECK: [[MV16:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV48]](s8), [[UV49]](s8), [[UV50]](s8)
+ ; CHECK: [[MV17:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV51]](s8), [[UV52]](s8), [[UV53]](s8)
+ ; CHECK: [[MV18:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV54]](s8), [[UV55]](s8), [[UV56]](s8)
+ ; CHECK: [[MV19:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV57]](s8), [[UV58]](s8), [[UV59]](s8)
+ ; CHECK: [[MV20:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV60]](s8), [[UV61]](s8), [[UV62]](s8)
+ ; CHECK: [[MV21:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV63]](s8), [[UV64]](s8), [[UV65]](s8)
+ ; CHECK: [[MV22:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV66]](s8), [[UV67]](s8), [[UV68]](s8)
+ ; CHECK: [[MV23:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV69]](s8), [[UV70]](s8), [[UV71]](s8)
+ ; CHECK: [[MV24:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV72]](s8), [[UV73]](s8), [[UV74]](s8)
+ ; CHECK: [[MV25:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV75]](s8), [[UV76]](s8), [[UV77]](s8)
+ ; CHECK: [[MV26:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV78]](s8), [[UV79]](s8), [[UV80]](s8)
+ ; CHECK: [[MV27:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV81]](s8), [[UV82]](s8), [[UV83]](s8)
+ ; CHECK: [[MV28:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV84]](s8), [[UV85]](s8), [[UV86]](s8)
+ ; CHECK: [[MV29:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV87]](s8), [[UV88]](s8), [[UV89]](s8)
+ ; CHECK: [[MV30:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV90]](s8), [[UV91]](s8), [[UV92]](s8)
+ ; CHECK: [[MV31:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV93]](s8), [[UV94]](s8), [[UV95]](s8)
+ ; CHECK: [[MV32:%[0-9]+]]:_(s24) = G_MERGE_VALUES [[UV96]](s8), [[UV97]](s8), [[UV98]](s8)
+ ; CHECK: %cst:_(s792) = G_MERGE_VALUES [[MV]](s24), [[MV1]](s24), [[MV2]](s24), [[MV3]](s24), [[MV4]](s24), [[MV5]](s24), [[MV6]](s24), [[MV7]](s24), [[MV8]](s24), [[MV9]](s24), [[MV10]](s24), [[MV11]](s24), [[MV12]](s24), [[MV13]](s24), [[MV14]](s24), [[MV15]](s24), [[MV16]](s24), [[MV17]](s24), [[MV18]](s24), [[MV19]](s24), [[MV20]](s24), [[MV21]](s24), [[MV22]](s24), [[MV23]](s24), [[MV24]](s24), [[MV25]](s24), [[MV26]](s24), [[MV27]](s24), [[MV28]](s24), [[MV29]](s24), [[MV30]](s24), [[MV31]](s24), [[MV32]](s24)
+ ; CHECK: %trunc:_(s32) = G_TRUNC %cst(s792)
+ ; CHECK: $w0 = COPY %trunc(s32)
+ ; CHECK: RET_ReallyLR implicit $w0
+ %cst:_(s792) = G_CONSTANT i792 0
+ %trunc:_(s32) = G_TRUNC %cst(s792)
+ $w0 = COPY %trunc(s32)
+ RET_ReallyLR implicit $w0
+...
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