[PATCH] D105730: [SLP] match logical and/or as reduction candidates

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: ABataev, RKSimon, lebedev.ri.
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This has been a work-in-progress for a long time...we finally have all of the pieces in place to handle vectorization of compare code as shown in:
https://llvm.org/PR41312

To do this (see PhaseOrdering tests), we converted SimplifyCFG and InstCombine to the poison-safe (select) forms of the logic ops, so now we need to have SLP recognize those patterns and insert a freeze op to make a safe reduction:
https://alive2.llvm.org/ce/z/NH54Ah

We get the minimal patterns with this patch, but the PhaseOrdering tests show that we still need adjustments to get the ideal IR in some or all of the motivating cases.


https://reviews.llvm.org/D105730

Files:
  llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
  llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
  llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll

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