[PATCH] D105684: [RegisterCoalescer] Make resolveConflicts aware of earlyclobber

ShihPo Hung via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 9 02:07:38 PDT 2021


arcbbb created this revision.
Herald added subscribers: tpr, hiraditya, qcolombet, MatzeB.
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Prior to this patch, it skipped the instruction defining VNI when checking if the tainted lanes are used.
We need to check that as well when there is a earlyclobber constraint.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D105684

Files:
  llvm/lib/CodeGen/RegisterCoalescer.cpp


Index: llvm/lib/CodeGen/RegisterCoalescer.cpp
===================================================================
--- llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -3025,8 +3025,10 @@
     MachineBasicBlock::iterator MI = MBB->begin();
     if (!VNI->isPHIDef()) {
       MI = Indexes->getInstructionFromIndex(VNI->def);
-      // No need to check the instruction defining VNI for reads.
-      ++MI;
+      if (!VNI->def.isEarlyClobber()) {
+          // No need to check the instruction defining VNI for reads.
+          MI++;
+      }
     }
     assert(!SlotIndex::isSameInstr(VNI->def, TaintExtent.front().first) &&
            "Interference ends on VNI->def. Should have been handled earlier");


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