[PATCH] D105486: [AArch64][SVE] Add ISel patterns for floating point compare with zero instructions

[Bradley Smith via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG026bb84bcd42: [AArch64][SVE] Add ISel patterns for floating point compare with zero… (authored by bsmith).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105486/new/

https://reviews.llvm.org/D105486

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-fcmp.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-fp-compares.ll

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