[PATCH] D104521: [InstrRef][AArch64][2/4] Recognise post-fe spills and restores

Jeremy Morse via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 7 08:59:47 PDT 2021


jmorse added a comment.

In D104521#2861294 <https://reviews.llvm.org/D104521#2861294>, @dmgreen wrote:

> I happened to be looking at these functions for a different reason yesterday. Out of interest, is there anything that really makes them target dependent? It seems like it should be able to check what it needs via the MMO's PseudoValue without needing to look at opcodes (or regs, as Eli mentioned).

I believe there's no target-independent way to identify the store-source register, which is what debug-info is interested in. On AArch64 it's the 3rd operand, on X86 it's the 6th (see sibling patch D105428 <https://reviews.llvm.org/D105428>). Previously debug-info has been looking for a killed register and assuming that that's the store-source, however there are various scenarios where spills don't kill registers.



================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:2190
+        (MI.getOperand(1).getReg() == AArch64::SP ||
+         MI.getOperand(1).getReg() == AArch64::WSP))
+      return MI.getOperand(0).getReg();
----------------
efriedma wrote:
> Why does it matter if the address computation SP, as opposed to the frame pointer or a scratch register?  It's a load from a stack slot either way.
I guess it doesn't -- I've been focusing on scenarios that involve spills and restores only, rather than general stack stores and loads. I'll revise this to not include the SP check.


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