[PATCH] D88898: [DebugInfo][InstrRef][4/4] Support using DBG_INSTR_REF through all* backend passes
Jeremy Morse via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 6 06:45:59 PDT 2021
jmorse updated this revision to Diff 356702.
jmorse added a comment.
Herald added a subscriber: tpr.
Shoe-horn in a collection of tiny adjustments: in register coalescing and liveintervals I've switched a few "isDebugValue" tests to be "isDebugInstr" instead. In all the modified cases, the code is seeking to avoid interpreting debug instructions or debug uses of a register -- I don't believe it matters whether it's a DBG_VALUE, DBG_VALUE_LIST, or DBG_PHI. Making these tests agnostic as to the instruction kind protects against codegen-changes-with-debugging-enabled.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D88898/new/
https://reviews.llvm.org/D88898
Files:
llvm/lib/CodeGen/LiveDebugVariables.cpp
llvm/lib/CodeGen/LiveIntervals.cpp
llvm/lib/CodeGen/MachineSink.cpp
llvm/lib/CodeGen/RegisterCoalescer.cpp
llvm/lib/CodeGen/RegisterPressure.cpp
llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
llvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir
llvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir
llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
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