[PATCH] D104509: [RegisterCoalescer] Resolve conflict based on liveness of subregister

Ruiling, Song via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 6 01:04:58 PDT 2021


ruiling added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll:355
   ; CHECK:   [[V_OR_B32_e32_62:%[0-9]+]]:vgpr_32 = V_OR_B32_e32 [[V_OR_B32_e32_61]], [[V_ADD_U32_e32_26]], implicit $exec
-  ; CHECK:   [[SI_SPILL_S32_RESTORE1:%[0-9]+]]:sreg_32_xm0_xexec = SI_SPILL_S32_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load 4 from %stack.0, addrspace 5)
-  ; CHECK:   [[SI_SPILL_S128_RESTORE:%[0-9]+]]:sgpr_128 = SI_SPILL_S128_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load 16 from %stack.1, align 4, addrspace 5)
----------------
ruiling wrote:
> arsenm wrote:
> > I'm a bit worried this test is no longer hitting what it was supposed to be testing
> I have not check into details, I am not sure @foad Do you have any idea on this?
I tried below steps hoping to hitting the issue this was used to test (I have revert @foad's change to make it assert). But I failed to reproduce with my change.
```
llc -march=amdgcn -mcpu=gfx1010 -stop-before=greedy llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll -o 1.mir
llc -march=amdgcn -mcpu=gfx1010 -run-pass=greey 1.mir 
```
I have also tried various ways to manually edit the .ll file, also failed to trigger the old issue. Any suggestion?


Repository:
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  https://reviews.llvm.org/D104509/new/

https://reviews.llvm.org/D104509



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