[llvm] a77e2d1 - [ARM] Fix arm.mve.pred.v2i range upper limit

[David Green via llvm-commits]

Author: David Green
Date: 2021-07-05T21:06:30+01:00
New Revision: a77e2d196c39950e191f9d0ce7e61920ac32f4e7

URL: https://github.com/llvm/llvm-project/commit/a77e2d196c39950e191f9d0ce7e61920ac32f4e7
DIFF: https://github.com/llvm/llvm-project/commit/a77e2d196c39950e191f9d0ce7e61920ac32f4e7.diff

LOG: [ARM] Fix arm.mve.pred.v2i range upper limit

The range metadata specifies a half open range, so our top limit was one
off.

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
    llvm/test/Transforms/InstCombine/ARM/mve-v2i2v.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
index 7410d8d1eabe4..f8951434ed8ce 100644
--- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
@@ -201,7 +201,7 @@ ARMTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
       Type *IntTy32 = Type::getInt32Ty(II.getContext());
       Metadata *M[] = {
           ConstantAsMetadata::get(ConstantInt::get(IntTy32, 0)),
-          ConstantAsMetadata::get(ConstantInt::get(IntTy32, 0xFFFF))};
+          ConstantAsMetadata::get(ConstantInt::get(IntTy32, 0x10000))};
       II.setMetadata(LLVMContext::MD_range, MDNode::get(II.getContext(), M));
       return ⅈ
     }

diff  --git a/llvm/test/Transforms/InstCombine/ARM/mve-v2i2v.ll b/llvm/test/Transforms/InstCombine/ARM/mve-v2i2v.ll
index 0b1f9fdaad9ac..d1207bef925f3 100644
--- a/llvm/test/Transforms/InstCombine/ARM/mve-v2i2v.ll
+++ b/llvm/test/Transforms/InstCombine/ARM/mve-v2i2v.ll
@@ -53,7 +53,7 @@ entry:
 define <16 x i1> @v2i2v_4_16(<4 x i1> %vin) {
 ; CHECK-LABEL: @v2i2v_4_16(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[INT:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[VIN:%.*]]), !range !0
+; CHECK-NEXT:    [[INT:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[VIN:%.*]]), !range [[RNG0:![0-9]+]]
 ; CHECK-NEXT:    [[VOUT:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[INT]])
 ; CHECK-NEXT:    ret <16 x i1> [[VOUT]]
 ;
@@ -66,7 +66,7 @@ entry:
 define <4 x i1> @v2i2v_8_4(<8 x i1> %vin) {
 ; CHECK-LABEL: @v2i2v_8_4(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[INT:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[VIN:%.*]]), !range !0
+; CHECK-NEXT:    [[INT:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[VIN:%.*]]), !range [[RNG0]]
 ; CHECK-NEXT:    [[VOUT:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[INT]])
 ; CHECK-NEXT:    ret <4 x i1> [[VOUT]]
 ;
@@ -79,7 +79,7 @@ entry:
 define <8 x i1> @v2i2v_16_8(<16 x i1> %vin) {
 ; CHECK-LABEL: @v2i2v_16_8(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[INT:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v16i1(<16 x i1> [[VIN:%.*]]), !range !0
+; CHECK-NEXT:    [[INT:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v16i1(<16 x i1> [[VIN:%.*]]), !range [[RNG0]]
 ; CHECK-NEXT:    [[VOUT:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[INT]])
 ; CHECK-NEXT:    ret <8 x i1> [[VOUT]]
 ;
@@ -133,7 +133,7 @@ entry:
 define i32 @v2i_truncext_i16(<4 x i1> %vin) {
 ; CHECK-LABEL: @v2i_truncext_i16(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[WIDE1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[VIN:%.*]]), !range !0
+; CHECK-NEXT:    [[WIDE1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[VIN:%.*]]), !range [[RNG0]]
 ; CHECK-NEXT:    ret i32 [[WIDE1]]
 ;
 entry:
@@ -146,7 +146,7 @@ entry:
 define i32 @v2i_truncext_i8(<4 x i1> %vin) {
 ; CHECK-LABEL: @v2i_truncext_i8(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[WIDE1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[VIN:%.*]]), !range !0
+; CHECK-NEXT:    [[WIDE1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[VIN:%.*]]), !range [[RNG0]]
 ; CHECK-NEXT:    [[WIDE2:%.*]] = and i32 [[WIDE1]], 255
 ; CHECK-NEXT:    ret i32 [[WIDE2]]
 ;
@@ -160,7 +160,7 @@ entry:
 define i32 @v2i_and_16(<4 x i1> %vin) {
 ; CHECK-LABEL: @v2i_and_16(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[WIDE1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[VIN:%.*]]), !range !0
+; CHECK-NEXT:    [[WIDE1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[VIN:%.*]]), !range [[RNG0]]
 ; CHECK-NEXT:    ret i32 [[WIDE1]]
 ;
 entry:
@@ -172,7 +172,7 @@ entry:
 define i32 @v2i_and_15(<4 x i1> %vin) {
 ; CHECK-LABEL: @v2i_and_15(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[WIDE1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[VIN:%.*]]), !range !0
+; CHECK-NEXT:    [[WIDE1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[VIN:%.*]]), !range [[RNG0]]
 ; CHECK-NEXT:    [[WIDE2:%.*]] = and i32 [[WIDE1]], 32767
 ; CHECK-NEXT:    ret i32 [[WIDE2]]
 ;
@@ -328,3 +328,18 @@ entry:
   %vout = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 %flipped)
   ret <16 x i1> %vout
 }
+
+define i32 @range_upper_limit(<16 x i1> %vin) {
+; CHECK-LABEL: @range_upper_limit(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[INT:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v16i1(<16 x i1> [[VIN:%.*]]), !range [[RNG0]]
+; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 [[INT]], 65535
+; CHECK-NEXT:    [[S:%.*]] = zext i1 [[C]] to i32
+; CHECK-NEXT:    ret i32 [[S]]
+;
+entry:
+  %int = call i32 @llvm.arm.mve.pred.v2i.v16i1(<16 x i1> %vin)
+  %c = icmp eq i32 %int, 65535
+  %s = select i1 %c, i32 1, i32 0
+  ret i32 %s
+}