[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Victor Huang via Phabricator via llvm-commits]

NeHuang added a comment.

Please add the sema check & error test case for the two 64 bit only builtins `ldarx` and `stdcx`



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Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll:10
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) local_unnamed_addr #0 {
+; CHECK-LABEL: test_ldarx:
----------------
remove `local_unnamed_addr #0`


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Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll:22
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) local_unnamed_addr #0 {
+; CHECK-LABEL: test:
----------------
remove `local_unnamed_addr #0`


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Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll:12
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_lwarx:
----------------
remove `local_unnamed_addr #0`


================
Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll:30
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_stwcx:
----------------
remove `local_unnamed_addr #0`


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D105236/new/

https://reviews.llvm.org/D105236