[llvm] 03e9dcf - [AIX] Use AsmParser to do inline asm parsing
Jinsong Ji via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 2 09:12:35 PDT 2021
Author: Jinsong Ji
Date: 2021-07-02T16:12:21Z
New Revision: 03e9dcfd41d461633536690d1cc281e5f7300a3e
URL: https://github.com/llvm/llvm-project/commit/03e9dcfd41d461633536690d1cc281e5f7300a3e
DIFF: https://github.com/llvm/llvm-project/commit/03e9dcfd41d461633536690d1cc281e5f7300a3e.diff
LOG: [AIX] Use AsmParser to do inline asm parsing
Add a flag so that target can choose to use AsmParser for parsing inline asm.
And set the flag by default for AIX.
-no-intergrated-as will override this default if specified explicitly.
Reviewed By: #powerpc, shchenz
Differential Revision: https://reviews.llvm.org/D105314
Added:
llvm/test/CodeGen/PowerPC/inline-asm-label.ll
Modified:
llvm/include/llvm/MC/MCAsmInfo.h
llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
llvm/lib/CodeGen/LLVMTargetMachine.cpp
llvm/lib/MC/MCAsmInfo.cpp
llvm/lib/MC/MCAsmInfoXCOFF.cpp
llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCAsmInfo.h b/llvm/include/llvm/MC/MCAsmInfo.h
index f5efd0dee21fa..b1d6b7fb7fd34 100644
--- a/llvm/include/llvm/MC/MCAsmInfo.h
+++ b/llvm/include/llvm/MC/MCAsmInfo.h
@@ -497,6 +497,9 @@ class MCAsmInfo {
/// construction (see LLVMTargetMachine::initAsmInfo()).
bool UseIntegratedAssembler;
+ /// Use AsmParser to parse inlineAsm when UseIntegratedAssembler is not set.
+ bool ParseInlineAsmUsingAsmParser;
+
/// Preserve Comments in assembly
bool PreserveAsmComments;
@@ -805,6 +808,11 @@ class MCAsmInfo {
/// Return true if assembly (inline or otherwise) should be parsed.
bool useIntegratedAssembler() const { return UseIntegratedAssembler; }
+ /// Return true if target want to use AsmParser to parse inlineasm.
+ bool parseInlineAsmUsingAsmParser() const {
+ return ParseInlineAsmUsingAsmParser;
+ }
+
bool binutilsIsAtLeast(int Major, int Minor) const {
return BinutilsVersion >= std::make_pair(Major, Minor);
}
@@ -814,6 +822,11 @@ class MCAsmInfo {
UseIntegratedAssembler = Value;
}
+ /// Set whether target want to use AsmParser to parse inlineasm.
+ virtual void setParseInlineAsmUsingAsmParser(bool Value) {
+ ParseInlineAsmUsingAsmParser = Value;
+ }
+
/// Return true if assembly (inline or otherwise) should be parsed.
bool preserveAsmComments() const { return PreserveAsmComments; }
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
index b49e7f6c700cb..f00e4924e9f25 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
@@ -78,13 +78,14 @@ void AsmPrinter::emitInlineAsm(StringRef Str, const MCSubtargetInfo &STI,
Str = Str.substr(0, Str.size()-1);
// If the output streamer does not have mature MC support or the integrated
- // assembler has been disabled, just emit the blob textually.
+ // assembler has been disabled or not required, just emit the blob textually.
// Otherwise parse the asm and emit it via MC support.
// This is useful in case the asm parser doesn't handle something but the
// system assembler does.
const MCAsmInfo *MCAI = TM.getMCAsmInfo();
assert(MCAI && "No MCAsmInfo");
if (!MCAI->useIntegratedAssembler() &&
+ !MCAI->parseInlineAsmUsingAsmParser() &&
!OutStreamer->isIntegratedAssemblerRequired()) {
emitInlineAsmStart();
OutStreamer->emitRawText(Str);
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
index f9b7bf613ff6b..37c0b44ea2b24 100644
--- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -64,8 +64,12 @@ void LLVMTargetMachine::initAsmInfo() {
if (Options.BinutilsVersion.first > 0)
TmpAsmInfo->setBinutilsVersion(Options.BinutilsVersion);
- if (Options.DisableIntegratedAS)
+ if (Options.DisableIntegratedAS) {
TmpAsmInfo->setUseIntegratedAssembler(false);
+ // If there is explict option disable integratedAS, we can't use it for
+ // inlineasm either.
+ TmpAsmInfo->setParseInlineAsmUsingAsmParser(false);
+ }
TmpAsmInfo->setPreserveAsmComments(Options.MCOptions.PreserveAsmComments);
diff --git a/llvm/lib/MC/MCAsmInfo.cpp b/llvm/lib/MC/MCAsmInfo.cpp
index 7484bd1827cdb..f52503d7b1606 100644
--- a/llvm/lib/MC/MCAsmInfo.cpp
+++ b/llvm/lib/MC/MCAsmInfo.cpp
@@ -77,6 +77,7 @@ MCAsmInfo::MCAsmInfo() {
// architecture basis.
// - The target subclasses for AArch64, ARM, and X86 handle these cases
UseIntegratedAssembler = true;
+ ParseInlineAsmUsingAsmParser = false;
PreserveAsmComments = true;
}
diff --git a/llvm/lib/MC/MCAsmInfoXCOFF.cpp b/llvm/lib/MC/MCAsmInfoXCOFF.cpp
index a552578976088..0006754acb86b 100644
--- a/llvm/lib/MC/MCAsmInfoXCOFF.cpp
+++ b/llvm/lib/MC/MCAsmInfoXCOFF.cpp
@@ -52,6 +52,7 @@ MCAsmInfoXCOFF::MCAsmInfoXCOFF() {
LCOMMDirectiveAlignmentType = LCOMM::Log2Alignment;
HasDotTypeDotSizeDirective = false;
UseIntegratedAssembler = false;
+ ParseInlineAsmUsingAsmParser = true;
NeedsFunctionDescriptors = true;
ExceptionsType = ExceptionHandling::AIX;
diff --git a/llvm/test/CodeGen/PowerPC/inline-asm-label.ll b/llvm/test/CodeGen/PowerPC/inline-asm-label.ll
new file mode 100644
index 0000000000000..6bacbd77aba2c
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/inline-asm-label.ll
@@ -0,0 +1,47 @@
+; RUN: llc -mcpu=pwr7 -verify-machineinstrs \
+; RUN: -mtriple=powerpc-unknown-aix < %s | FileCheck %s
+
+; RUN: llc -mcpu=pwr7 -verify-machineinstrs \
+; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s
+
+; RUN: llc -mcpu=pwr7 -verify-machineinstrs -no-integrated-as \
+; RUN: -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix=NOIS
+
+
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local signext i32 @NoBarrier_CompareAndSwap(i32* %ptr, i32 signext %old_value, i32 signext %new_value) #0 {
+; CHECK-LABEL: NoBarrier_CompareAndSwap:
+; CHECK: #APP
+; CHECK-NEXT: L..tmp0:
+; CHECK-NEXT: lwarx 6, 0, 3
+; CHECK-NEXT: cmpw 4, 6
+; CHECK-NEXT: bne- 0, L..tmp1
+; CHECK-NEXT: stwcx. 5, 0, 3
+; CHECK-NEXT: bne- 0, L..tmp0
+; CHECK-NEXT: L..tmp1:
+
+; NOIS-LABEL: NoBarrier_CompareAndSwap:
+; NOIS: #APP
+; NOIS-NEXT: 1: lwarx 6, 0, 3
+; NOIS-NEXT: cmpw 4, 6
+; NOIS-NEXT: bne- 2f
+; NOIS-NEXT: stwcx. 5, 0, 3
+; NOIS-NEXT: bne- 1b
+; NOIS-NEXT: 2:
+
+entry:
+ %ptr.addr = alloca i32*, align 8 %old_value.addr = alloca i32, align 4
+ %new_value.addr = alloca i32, align 4
+ %result = alloca i32, align 4
+ store i32* %ptr, i32** %ptr.addr, align 8
+ store i32 %old_value, i32* %old_value.addr, align 4
+ store i32 %new_value, i32* %new_value.addr, align 4
+ %0 = load i32*, i32** %ptr.addr, align 8
+ %1 = load i32, i32* %old_value.addr, align 4
+ %2 = load i32, i32* %new_value.addr, align 4
+ %3 = call i32 asm sideeffect "1: lwarx $0, $4, $1 \0A\09 cmpw $2, $0 \0A\09 bne- 2f \0A\09 stwcx. $3, $4, $1 \0A\09 bne- 1b \0A\092: \0A\09", "=&b,b,b,b,i,~{cr0},~{ctr}"(i32* %0, i32 %1, i32 %2, i32 0)
+ store i32 %3, i32* %result, align 4
+ %4 = load i32, i32* %result, align 4
+ ret i32 %4
+}
+
diff --git a/llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr.ll b/llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr.ll
index 132b5d1500548..75a13fcfb2287 100644
--- a/llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr.ll
+++ b/llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr.ll
@@ -13,7 +13,7 @@ entry:
; CHECK-LABEL: test_double
; CHECK: #APP
-; CHECK-NEXT: fadd. 31,1,2
+; CHECK-NEXT: fadd. 31, 1, 2
define dso_local signext i32 @test_int(double %a, double %b) {
entry:
@@ -23,4 +23,4 @@ entry:
; CHECK-LABEL: test_int
; CHECK: #APP
-; CHECK-NEXT: fadd. 0,1,2
+; CHECK-NEXT: fadd. 0, 1, 2
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