[llvm] 48db080 - [NFC][SimplifyCFG] Autogenerate checklines in trapping-load-unreachable.ll test

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2021-07-02T12:59:14+03:00
New Revision: 48db080383765893d5dca3c48ef575c36afd137b

URL: https://github.com/llvm/llvm-project/commit/48db080383765893d5dca3c48ef575c36afd137b
DIFF: https://github.com/llvm/llvm-project/commit/48db080383765893d5dca3c48ef575c36afd137b.diff

LOG: [NFC][SimplifyCFG] Autogenerate checklines in trapping-load-unreachable.ll test

Added: 
    

Modified: 
    llvm/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll b/llvm/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll
index c16c618a90811..b277cb6cf4f9a 100644
--- a/llvm/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll
+++ b/llvm/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
 ; PR2967
 
@@ -6,85 +7,113 @@ target datalayout =
 target triple = "i386-pc-linux-gnu"
 
 define void @test1(i32 %x) nounwind {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i32 [[X:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[BB:%.*]], label [[RETURN:%.*]]
+; CHECK:       bb:
+; CHECK-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* null, align 4
+; CHECK-NEXT:    unreachable
+; CHECK:       return:
+; CHECK-NEXT:    ret void
+;
 entry:
-        %0 = icmp eq i32 %x, 0          ; <i1> [#uses=1]
-        br i1 %0, label %bb, label %return
+  %0 = icmp eq i32 %x, 0          ; <i1> [#uses=1]
+  br i1 %0, label %bb, label %return
 
 bb:             ; preds = %entry
-        %1 = load volatile i32, i32* null
-        unreachable
+  %1 = load volatile i32, i32* null
+  unreachable
 
-        br label %return
+  br label %return
 return:         ; preds = %entry
-        ret void
-; CHECK-LABEL: @test1(
-; CHECK: load volatile
+  ret void
 }
 
 define void @test1_no_null_opt(i32 %x) nounwind #0 {
+; CHECK-LABEL: @test1_no_null_opt(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i32 [[X:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[BB:%.*]], label [[RETURN:%.*]]
+; CHECK:       bb:
+; CHECK-NEXT:    [[TMP1:%.*]] = load volatile i32, i32* null, align 4
+; CHECK-NEXT:    unreachable
+; CHECK:       return:
+; CHECK-NEXT:    ret void
+;
 entry:
-        %0 = icmp eq i32 %x, 0          ; <i1> [#uses=1]
-        br i1 %0, label %bb, label %return
+  %0 = icmp eq i32 %x, 0          ; <i1> [#uses=1]
+  br i1 %0, label %bb, label %return
 
 bb:             ; preds = %entry
-        %1 = load volatile i32, i32* null
-        unreachable
+  %1 = load volatile i32, i32* null
+  unreachable
 
-        br label %return
+  br label %return
 return:         ; preds = %entry
-        ret void
-; CHECK-LABEL: @test1_no_null_opt(
-; CHECK: load volatile
-; CHECK: unreachable
+  ret void
 }
 
 ; rdar://7958343
 define void @test2() nounwind {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    call void @llvm.trap()
+; CHECK-NEXT:    unreachable
+;
 entry:
-        store i32 4,i32* null
-        ret void
+  store i32 4,i32* null
+  ret void
 
-; CHECK-LABEL: @test2(
-; CHECK: call void @llvm.trap
-; CHECK: unreachable
 }
 
 define void @test2_no_null_opt() nounwind #0 {
-entry:
-        store i32 4,i32* null
-        ret void
 ; CHECK-LABEL: @test2_no_null_opt(
-; CHECK: store i32 4, i32* null
-; CHECK-NOT: call void @llvm.trap
-; CHECK: ret
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    store i32 4, i32* null, align 4
+; CHECK-NEXT:    ret void
+;
+entry:
+  store i32 4,i32* null
+  ret void
 }
 
 ; PR7369
 define void @test3() nounwind {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    store volatile i32 4, i32* null, align 4
+; CHECK-NEXT:    ret void
+;
 entry:
-        store volatile i32 4, i32* null
-        ret void
+  store volatile i32 4, i32* null
+  ret void
 
-; CHECK-LABEL: @test3(
-; CHECK: store volatile i32 4, i32* null
-; CHECK: ret
 }
 
 define void @test3_no_null_opt() nounwind #0 {
+; CHECK-LABEL: @test3_no_null_opt(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    store volatile i32 4, i32* null, align 4
+; CHECK-NEXT:    ret void
+;
 entry:
-        store volatile i32 4, i32* null
-        ret void
+  store volatile i32 4, i32* null
+  ret void
 
-; CHECK-LABEL: @test3_no_null_opt(
-; CHECK: store volatile i32 4, i32* null
-; CHECK: ret
 }
 
 ; Check store before unreachable.
 define void @test4(i1 %C, i32* %P) {
 ; CHECK-LABEL: @test4(
-; CHECK: entry:
-; CHECK-NEXT: br i1 %C
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br i1 [[C:%.*]], label [[T:%.*]], label [[F:%.*]]
+; CHECK:       T:
+; CHECK-NEXT:    store volatile i32 0, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    unreachable
+; CHECK:       F:
+; CHECK-NEXT:    ret void
+;
 entry:
   br i1 %C, label %T, label %F
 T:
@@ -97,8 +126,14 @@ F:
 ; Check cmpxchg before unreachable.
 define void @test5(i1 %C, i32* %P) {
 ; CHECK-LABEL: @test5(
-; CHECK: entry:
-; CHECK-NEXT: br i1 %C
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br i1 [[C:%.*]], label [[T:%.*]], label [[F:%.*]]
+; CHECK:       T:
+; CHECK-NEXT:    [[TMP0:%.*]] = cmpxchg volatile i32* [[P:%.*]], i32 0, i32 1 seq_cst seq_cst, align 4
+; CHECK-NEXT:    unreachable
+; CHECK:       F:
+; CHECK-NEXT:    ret void
+;
 entry:
   br i1 %C, label %T, label %F
 T:
@@ -111,8 +146,14 @@ F:
 ; Check atomicrmw before unreachable.
 define void @test6(i1 %C, i32* %P) {
 ; CHECK-LABEL: @test6(
-; CHECK: entry:
-; CHECK-NEXT: br i1 %C
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br i1 [[C:%.*]], label [[T:%.*]], label [[F:%.*]]
+; CHECK:       T:
+; CHECK-NEXT:    [[TMP0:%.*]] = atomicrmw volatile xchg i32* [[P:%.*]], i32 0 seq_cst, align 4
+; CHECK-NEXT:    unreachable
+; CHECK:       F:
+; CHECK-NEXT:    ret void
+;
 entry:
   br i1 %C, label %T, label %F
 T: