[PATCH] D105253: GlobalISel: Handle lowering non-power-of-2 extloads

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir:15995-16020
+    ; GFX9-MESA: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
+    ; GFX9-MESA: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32)
+    ; GFX9-MESA: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+    ; GFX9-MESA: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32)
+    ; GFX9-MESA: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+    ; GFX9-MESA: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C3]](s32)
+    ; GFX9-MESA: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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Why is this so much more convoluted than the GFX9-HSA case? The loads look the same, it's just all the shifting and ORing afterwards that looks crazy here.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105253/new/

https://reviews.llvm.org/D105253