[llvm] 59fa435 - [X86] Canonicalize SGT/UGT compares with constants to use SGE/UGE to reduce the number of EFLAGs reads. (PR48760)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 30 10:53:39 PDT 2021
Author: Simon Pilgrim
Date: 2021-06-30T18:46:50+01:00
New Revision: 59fa435ea66629b4c45d9e6b62fa6cc1cdf5d5aa
URL: https://github.com/llvm/llvm-project/commit/59fa435ea66629b4c45d9e6b62fa6cc1cdf5d5aa
DIFF: https://github.com/llvm/llvm-project/commit/59fa435ea66629b4c45d9e6b62fa6cc1cdf5d5aa.diff
LOG: [X86] Canonicalize SGT/UGT compares with constants to use SGE/UGE to reduce the number of EFLAGs reads. (PR48760)
This demonstrates a possible fix for PR48760 - for compares with constants, canonicalize the SGT/UGT condition code to use SGE/UGE which should reduce the number of EFLAGs bits we need to read.
As discussed on PR48760, some EFLAG bits are treated independently which can require additional uops to merge together for certain CMOVcc/SETcc/etc. modes.
I've limited this to cases where the constant increment doesn't result in a larger encoding or additional i64 constant materializations.
Differential Revision: https://reviews.llvm.org/D101074
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
llvm/test/CodeGen/X86/atomic-eflags-reuse.ll
llvm/test/CodeGen/X86/cmov.ll
llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
llvm/test/CodeGen/X86/mul-constant-result.ll
llvm/test/CodeGen/X86/or-branch.ll
llvm/test/CodeGen/X86/pr45995-2.ll
llvm/test/CodeGen/X86/pr5145.ll
llvm/test/CodeGen/X86/sadd_sat.ll
llvm/test/CodeGen/X86/sadd_sat_plus.ll
llvm/test/CodeGen/X86/sdiv_fix_sat.ll
llvm/test/CodeGen/X86/select.ll
llvm/test/CodeGen/X86/select_const.ll
llvm/test/CodeGen/X86/setcc-logic.ll
llvm/test/CodeGen/X86/setcc.ll
llvm/test/CodeGen/X86/smul_fix_sat.ll
llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
llvm/test/CodeGen/X86/srem-seteq.ll
llvm/test/CodeGen/X86/ssub_sat.ll
llvm/test/CodeGen/X86/ssub_sat_plus.ll
llvm/test/CodeGen/X86/umul_fix_sat.ll
llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll
llvm/test/CodeGen/X86/urem-seteq.ll
llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
llvm/test/CodeGen/X86/zext-sext.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 66c8943b1bcb0..b7d272c5aab87 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -23469,6 +23469,33 @@ SDValue X86TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
}
if (Op0.getSimpleValueType().isInteger()) {
+ // Attempt to canonicalize SGT/UGT -> SGE/UGE compares with constant which
+ // reduces the number of EFLAGs bit reads (the GE conditions don't read ZF),
+ // this may translate to less uops depending on uarch implementation. The
+ // equivalent for SLE/ULE -> SLT/ULT isn't likely to happen as we already
+ // canonicalize to that CondCode.
+ // NOTE: Only do this if incrementing the constant doesn't increase the bit
+ // encoding size - so it must either already be a i8 or i32 immediate, or it
+ // shrinks down to that. We don't do this for any i64's to avoid additional
+ // constant materializations.
+ // TODO: Can we move this to TranslateX86CC to handle jumps/branches too?
+ if (auto *Op1C = dyn_cast<ConstantSDNode>(Op1)) {
+ const APInt &Op1Val = Op1C->getAPIntValue();
+ if (!Op1Val.isNullValue()) {
+ // Ensure the constant+1 doesn't overflow.
+ if ((CC == ISD::CondCode::SETGT && !Op1Val.isMaxSignedValue()) ||
+ (CC == ISD::CondCode::SETUGT && !Op1Val.isMaxValue())) {
+ APInt Op1ValPlusOne = Op1Val + 1;
+ if (Op1ValPlusOne.isSignedIntN(32) &&
+ (!Op1Val.isSignedIntN(8) || Op1ValPlusOne.isSignedIntN(8))) {
+ Op1 = DAG.getConstant(Op1ValPlusOne, dl, Op0.getValueType());
+ CC = CC == ISD::CondCode::SETGT ? ISD::CondCode::SETGE
+ : ISD::CondCode::SETUGE;
+ }
+ }
+ }
+ }
+
SDValue X86CC;
SDValue EFLAGS = emitFlagsForSetcc(Op0, Op1, CC, dl, DAG, X86CC);
SDValue Res = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, X86CC, EFLAGS);
@@ -42054,6 +42081,31 @@ static SDValue combineSetCCAtomicArith(SDValue Cmp, X86::CondCode &CC,
APInt Comparison = CmpRHSC->getAPIntValue();
APInt NegAddend = -Addend;
+ // See if we can adjust the CC to make the comparison match the negated
+ // addend.
+ if (Comparison != NegAddend) {
+ APInt IncComparison = Comparison + 1;
+ if (IncComparison == NegAddend) {
+ if (CC == X86::COND_A && !Comparison.isMaxValue()) {
+ Comparison = IncComparison;
+ CC = X86::COND_AE;
+ } else if (CC == X86::COND_LE && !Comparison.isMaxSignedValue()) {
+ Comparison = IncComparison;
+ CC = X86::COND_L;
+ }
+ }
+ APInt DecComparison = Comparison - 1;
+ if (DecComparison == NegAddend) {
+ if (CC == X86::COND_AE && !Comparison.isMinValue()) {
+ Comparison = DecComparison;
+ CC = X86::COND_A;
+ } else if (CC == X86::COND_L && !Comparison.isMinSignedValue()) {
+ Comparison = DecComparison;
+ CC = X86::COND_LE;
+ }
+ }
+ }
+
// If the addend is the negation of the comparison value, then we can do
// a full comparison by emitting the atomic arithmetic as a locked sub.
if (Comparison == NegAddend) {
diff --git a/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll b/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
index c21b6c294b58b..dff4baf6859f1 100644
--- a/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
+++ b/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
@@ -13,8 +13,8 @@ define i32 @func_44(i16 signext %p_46) nounwind {
; SOURCE-SCHED-NEXT: movl g_5, %eax
; SOURCE-SCHED-NEXT: sarl %eax
; SOURCE-SCHED-NEXT: xorl %ecx, %ecx
-; SOURCE-SCHED-NEXT: cmpl $1, %eax
-; SOURCE-SCHED-NEXT: setg %cl
+; SOURCE-SCHED-NEXT: cmpl $2, %eax
+; SOURCE-SCHED-NEXT: setge %cl
; SOURCE-SCHED-NEXT: movb g_73, %dl
; SOURCE-SCHED-NEXT: xorl %eax, %eax
; SOURCE-SCHED-NEXT: subb {{[0-9]+}}(%esp), %al
diff --git a/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll b/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll
index b5a27892ad2f2..5e5e0eed6ca0a 100644
--- a/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll
+++ b/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll
@@ -55,7 +55,7 @@ define i32 @test_sub_1_cmov_sle(i64* %p, i32 %a0, i32 %a1) #0 {
; SLOWINCDEC-LABEL: test_sub_1_cmov_sle:
; SLOWINCDEC: # %bb.0: # %entry
; SLOWINCDEC-NEXT: movl %esi, %eax
-; SLOWINCDEC-NEXT: lock addq $-1, (%rdi)
+; SLOWINCDEC-NEXT: lock subq $1, (%rdi)
; SLOWINCDEC-NEXT: cmovgel %edx, %eax
; SLOWINCDEC-NEXT: retq
entry:
@@ -298,16 +298,18 @@ entry:
ret i8 %tmp2
}
-; FIXME: This test canonicalizes in a way that hides the fact that the
-; comparison can be folded into the atomic subtract.
define i8 @test_sub_1_cmp_1_setcc_sle(i64* %p) #0 {
-; CHECK-LABEL: test_sub_1_cmp_1_setcc_sle:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movq $-1, %rax
-; CHECK-NEXT: lock xaddq %rax, (%rdi)
-; CHECK-NEXT: cmpq $2, %rax
-; CHECK-NEXT: setl %al
-; CHECK-NEXT: retq
+; FASTINCDEC-LABEL: test_sub_1_cmp_1_setcc_sle:
+; FASTINCDEC: # %bb.0: # %entry
+; FASTINCDEC-NEXT: lock decq (%rdi)
+; FASTINCDEC-NEXT: setle %al
+; FASTINCDEC-NEXT: retq
+;
+; SLOWINCDEC-LABEL: test_sub_1_cmp_1_setcc_sle:
+; SLOWINCDEC: # %bb.0: # %entry
+; SLOWINCDEC-NEXT: lock subq $1, (%rdi)
+; SLOWINCDEC-NEXT: setle %al
+; SLOWINCDEC-NEXT: retq
entry:
%tmp0 = atomicrmw sub i64* %p, i64 1 seq_cst
%tmp1 = icmp sle i64 %tmp0, 1
@@ -328,15 +330,11 @@ entry:
ret i8 %tmp2
}
-; FIXME: This test canonicalizes in a way that hides the fact that the
-; comparison can be folded into the atomic subtract.
define i8 @test_sub_3_cmp_3_setcc_uge(i64* %p) #0 {
; CHECK-LABEL: test_sub_3_cmp_3_setcc_uge:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movq $-3, %rax
-; CHECK-NEXT: lock xaddq %rax, (%rdi)
-; CHECK-NEXT: cmpq $2, %rax
-; CHECK-NEXT: seta %al
+; CHECK-NEXT: lock subq $3, (%rdi)
+; CHECK-NEXT: setae %al
; CHECK-NEXT: retq
entry:
%tmp0 = atomicrmw sub i64* %p, i64 3 seq_cst
diff --git a/llvm/test/CodeGen/X86/cmov.ll b/llvm/test/CodeGen/X86/cmov.ll
index 9aaf8eb5463c3..bc42a2b5a7368 100644
--- a/llvm/test/CodeGen/X86/cmov.ll
+++ b/llvm/test/CodeGen/X86/cmov.ll
@@ -159,8 +159,8 @@ define i32 @test5(i32* nocapture %P) nounwind readonly {
; CHECK-LABEL: test5:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: cmpl $41, (%rdi)
-; CHECK-NEXT: setg %al
+; CHECK-NEXT: cmpl $42, (%rdi)
+; CHECK-NEXT: setge %al
; CHECK-NEXT: orl $-2, %eax
; CHECK-NEXT: retq
entry:
@@ -202,9 +202,8 @@ define i64 @test8(i64 %0, i64 %1, i64 %2) {
; CHECK-LABEL: test8:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rsi, %rax
-; CHECK-NEXT: movabsq $-2147483649, %rcx # imm = 0xFFFFFFFF7FFFFFFF
-; CHECK-NEXT: cmpq %rcx, %rdi
-; CHECK-NEXT: cmovleq %rdx, %rax
+; CHECK-NEXT: cmpq $-2147483648, %rdi # imm = 0x80000000
+; CHECK-NEXT: cmovlq %rdx, %rax
; CHECK-NEXT: retq
%4 = icmp sgt i64 %0, -2147483649
%5 = select i1 %4, i64 %1, i64 %2
diff --git a/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll b/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
index 3b0c5b89c57ac..7bef94cca0d35 100644
--- a/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
+++ b/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
@@ -465,16 +465,16 @@ define i1 @add_ugecmp_bad_i16_i8_add(i16 %x, i16 %y) nounwind {
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addw {{[0-9]+}}(%esp), %ax
; X86-NEXT: movzwl %ax, %eax
-; X86-NEXT: cmpl $255, %eax
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $256, %eax # imm = 0x100
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_bad_i16_i8_add:
; X64: # %bb.0:
; X64-NEXT: addl %esi, %edi
; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: cmpl $255, %eax
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $256, %eax # imm = 0x100
+; X64-NEXT: setae %al
; X64-NEXT: retq
%tmp0 = add i16 %x, %y
%tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8
@@ -530,16 +530,16 @@ define i1 @add_ugecmp_bad_i16_i8_c0notpoweroftwo(i16 %x) nounwind {
; X86-NEXT: movl $192, %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzwl %ax, %eax
-; X86-NEXT: cmpl $255, %eax
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $256, %eax # imm = 0x100
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_bad_i16_i8_c0notpoweroftwo:
; X64: # %bb.0:
; X64-NEXT: addl $192, %edi
; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: cmpl $255, %eax
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $256, %eax # imm = 0x100
+; X64-NEXT: setae %al
; X64-NEXT: retq
%tmp0 = add i16 %x, 192 ; (1U << (8-1)) + (1U << (8-1-1))
%tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8
@@ -553,16 +553,16 @@ define i1 @add_ugecmp_bad_i16_i8_c1notpoweroftwo(i16 %x) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax
; X86-NEXT: movzwl %ax, %eax
-; X86-NEXT: cmpl $767, %eax # imm = 0x2FF
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $768, %eax # imm = 0x300
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_bad_i16_i8_c1notpoweroftwo:
; X64: # %bb.0:
; X64-NEXT: subl $-128, %edi
; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: cmpl $767, %eax # imm = 0x2FF
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $768, %eax # imm = 0x300
+; X64-NEXT: setae %al
; X64-NEXT: retq
%tmp0 = add i16 %x, 128 ; 1U << (8-1)
%tmp1 = icmp uge i16 %tmp0, 768 ; (1U << 8)) + (1U << (8+1))
@@ -576,16 +576,16 @@ define i1 @add_ugecmp_bad_i16_i8_magic(i16 %x) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $64, %eax
; X86-NEXT: movzwl %ax, %eax
-; X86-NEXT: cmpl $255, %eax
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $256, %eax # imm = 0x100
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_bad_i16_i8_magic:
; X64: # %bb.0:
; X64-NEXT: addl $64, %edi
; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: cmpl $255, %eax
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $256, %eax # imm = 0x100
+; X64-NEXT: setae %al
; X64-NEXT: retq
%tmp0 = add i16 %x, 64 ; 1U << (8-1-1)
%tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8
@@ -598,15 +598,15 @@ define i1 @add_ugecmp_bad_i16_i4(i16 %x) nounwind {
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $8, %eax
-; X86-NEXT: cmpw $15, %ax
-; X86-NEXT: seta %al
+; X86-NEXT: cmpw $16, %ax
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_bad_i16_i4:
; X64: # %bb.0:
; X64-NEXT: addl $8, %edi
-; X64-NEXT: cmpw $15, %di
-; X64-NEXT: seta %al
+; X64-NEXT: cmpw $16, %di
+; X64-NEXT: setae %al
; X64-NEXT: retq
%tmp0 = add i16 %x, 8 ; 1U << (4-1)
%tmp1 = icmp uge i16 %tmp0, 16 ; 1U << 4
@@ -620,16 +620,16 @@ define i1 @add_ugecmp_bad_i24_i8(i24 %x) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl $-128, %eax
; X86-NEXT: andl $16777215, %eax # imm = 0xFFFFFF
-; X86-NEXT: cmpl $255, %eax
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $256, %eax # imm = 0x100
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_bad_i24_i8:
; X64: # %bb.0:
; X64-NEXT: subl $-128, %edi
; X64-NEXT: andl $16777215, %edi # imm = 0xFFFFFF
-; X64-NEXT: cmpl $255, %edi
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $256, %edi # imm = 0x100
+; X64-NEXT: setae %al
; X64-NEXT: retq
%tmp0 = add i24 %x, 128 ; 1U << (8-1)
%tmp1 = icmp uge i24 %tmp0, 256 ; 1U << 8
diff --git a/llvm/test/CodeGen/X86/mul-constant-result.ll b/llvm/test/CodeGen/X86/mul-constant-result.ll
index ab0f0789aaca9..25b11d1bca3e3 100644
--- a/llvm/test/CodeGen/X86/mul-constant-result.ll
+++ b/llvm/test/CodeGen/X86/mul-constant-result.ll
@@ -13,10 +13,10 @@ define i32 @mult(i32, i32) local_unnamed_addr #0 {
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: cmpl $1, %edx
+; X86-NEXT: cmpl $2, %edx
; X86-NEXT: movl $1, %eax
; X86-NEXT: movl $1, %esi
-; X86-NEXT: jg .LBB0_2
+; X86-NEXT: jge .LBB0_2
; X86-NEXT: # %bb.1:
; X86-NEXT: movl %edx, %esi
; X86-NEXT: .LBB0_2:
@@ -188,10 +188,10 @@ define i32 @mult(i32, i32) local_unnamed_addr #0 {
; X64-HSW-LABEL: mult:
; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: def $edi killed $edi def $rdi
-; X64-HSW-NEXT: cmpl $1, %esi
+; X64-HSW-NEXT: cmpl $2, %esi
; X64-HSW-NEXT: movl $1, %ecx
; X64-HSW-NEXT: movl %esi, %eax
-; X64-HSW-NEXT: cmovgl %ecx, %eax
+; X64-HSW-NEXT: cmovgel %ecx, %eax
; X64-HSW-NEXT: testl %esi, %esi
; X64-HSW-NEXT: cmovel %ecx, %eax
; X64-HSW-NEXT: decl %edi
diff --git a/llvm/test/CodeGen/X86/or-branch.ll b/llvm/test/CodeGen/X86/or-branch.ll
index 1f71b97d2befb..c9f6e3e49632b 100644
--- a/llvm/test/CodeGen/X86/or-branch.ll
+++ b/llvm/test/CodeGen/X86/or-branch.ll
@@ -19,8 +19,8 @@ define void @foo(i32 %X, i32 %Y, i32 %Z) nounwind {
; JUMP1: # %bb.0: # %entry
; JUMP1-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; JUMP1-NEXT: setne %al
-; JUMP1-NEXT: cmpl $4, {{[0-9]+}}(%esp)
-; JUMP1-NEXT: setg %cl
+; JUMP1-NEXT: cmpl $5, {{[0-9]+}}(%esp)
+; JUMP1-NEXT: setge %cl
; JUMP1-NEXT: testb %al, %cl
; JUMP1-NEXT: jne .LBB0_1
; JUMP1-NEXT: # %bb.2: # %cond_true
@@ -49,8 +49,8 @@ define void @unpredictable(i32 %X, i32 %Y, i32 %Z) nounwind {
; JUMP2: # %bb.0: # %entry
; JUMP2-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; JUMP2-NEXT: setne %al
-; JUMP2-NEXT: cmpl $4, {{[0-9]+}}(%esp)
-; JUMP2-NEXT: setg %cl
+; JUMP2-NEXT: cmpl $5, {{[0-9]+}}(%esp)
+; JUMP2-NEXT: setge %cl
; JUMP2-NEXT: testb %al, %cl
; JUMP2-NEXT: jne .LBB1_1
; JUMP2-NEXT: # %bb.2: # %cond_true
@@ -62,8 +62,8 @@ define void @unpredictable(i32 %X, i32 %Y, i32 %Z) nounwind {
; JUMP1: # %bb.0: # %entry
; JUMP1-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; JUMP1-NEXT: setne %al
-; JUMP1-NEXT: cmpl $4, {{[0-9]+}}(%esp)
-; JUMP1-NEXT: setg %cl
+; JUMP1-NEXT: cmpl $5, {{[0-9]+}}(%esp)
+; JUMP1-NEXT: setge %cl
; JUMP1-NEXT: testb %al, %cl
; JUMP1-NEXT: jne .LBB1_1
; JUMP1-NEXT: # %bb.2: # %cond_true
diff --git a/llvm/test/CodeGen/X86/pr45995-2.ll b/llvm/test/CodeGen/X86/pr45995-2.ll
index 2d24138251e2c..27f1ef4cc7015 100644
--- a/llvm/test/CodeGen/X86/pr45995-2.ll
+++ b/llvm/test/CodeGen/X86/pr45995-2.ll
@@ -5,8 +5,8 @@ define <4 x i1> @selecter(i64 %0) {
; CHECK-LABEL: selecter:
; CHECK: # %bb.0:
; CHECK-NEXT: xor eax, eax
-; CHECK-NEXT: cmp rdi, 1
-; CHECK-NEXT: setg al
+; CHECK-NEXT: cmp rdi, 2
+; CHECK-NEXT: setge al
; CHECK-NEXT: lea eax, [rax + 2*rax]
; CHECK-NEXT: kmovd k0, eax
; CHECK-NEXT: vpmovm2d xmm0, k0
diff --git a/llvm/test/CodeGen/X86/pr5145.ll b/llvm/test/CodeGen/X86/pr5145.ll
index be1610a59a2bd..5858649b9ceb9 100644
--- a/llvm/test/CodeGen/X86/pr5145.ll
+++ b/llvm/test/CodeGen/X86/pr5145.ll
@@ -9,10 +9,10 @@ define void @atomic_maxmin_i8() {
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB0_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: cmpb $5, %al
+; CHECK-NEXT: cmpb $6, %al
; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: movl $5, %ecx
-; CHECK-NEXT: cmovgl %eax, %ecx
+; CHECK-NEXT: cmovgel %eax, %ecx
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: lock cmpxchgb %cl, sc8(%rip)
; CHECK-NEXT: jne .LBB0_1
@@ -33,10 +33,10 @@ define void @atomic_maxmin_i8() {
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB0_5: # %atomicrmw.start8
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: cmpb $7, %al
+; CHECK-NEXT: cmpb $8, %al
; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: movl $7, %ecx
-; CHECK-NEXT: cmoval %eax, %ecx
+; CHECK-NEXT: cmovael %eax, %ecx
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: lock cmpxchgb %cl, sc8(%rip)
; CHECK-NEXT: jne .LBB0_5
diff --git a/llvm/test/CodeGen/X86/sadd_sat.ll b/llvm/test/CodeGen/X86/sadd_sat.ll
index 6f16bd15c0e74..e866c82564425 100644
--- a/llvm/test/CodeGen/X86/sadd_sat.ll
+++ b/llvm/test/CodeGen/X86/sadd_sat.ll
@@ -151,9 +151,9 @@ define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {
; X86-NEXT: cmpb $7, %al
; X86-NEXT: movl $7, %eax
; X86-NEXT: cmovll %ecx, %eax
-; X86-NEXT: cmpb $-8, %al
+; X86-NEXT: cmpb $-7, %al
; X86-NEXT: movl $248, %ecx
-; X86-NEXT: cmovgl %eax, %ecx
+; X86-NEXT: cmovgel %eax, %ecx
; X86-NEXT: movsbl %cl, %eax
; X86-NEXT: retl
;
@@ -164,9 +164,9 @@ define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {
; X64-NEXT: cmpb $7, %al
; X64-NEXT: movl $7, %ecx
; X64-NEXT: cmovll %eax, %ecx
-; X64-NEXT: cmpb $-8, %cl
+; X64-NEXT: cmpb $-7, %cl
; X64-NEXT: movl $248, %eax
-; X64-NEXT: cmovgl %ecx, %eax
+; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: movsbl %al, %eax
; X64-NEXT: retq
%tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y);
diff --git a/llvm/test/CodeGen/X86/sadd_sat_plus.ll b/llvm/test/CodeGen/X86/sadd_sat_plus.ll
index f6f2eeaa5489a..e50f6d5b6c553 100644
--- a/llvm/test/CodeGen/X86/sadd_sat_plus.ll
+++ b/llvm/test/CodeGen/X86/sadd_sat_plus.ll
@@ -165,9 +165,9 @@ define signext i4 @func4(i4 signext %x, i4 signext %y, i4 signext %z) nounwind {
; X86-NEXT: cmpb $7, %al
; X86-NEXT: movl $7, %eax
; X86-NEXT: cmovll %ecx, %eax
-; X86-NEXT: cmpb $-8, %al
+; X86-NEXT: cmpb $-7, %al
; X86-NEXT: movl $248, %ecx
-; X86-NEXT: cmovgl %eax, %ecx
+; X86-NEXT: cmovgel %eax, %ecx
; X86-NEXT: movsbl %cl, %eax
; X86-NEXT: retl
;
@@ -183,9 +183,9 @@ define signext i4 @func4(i4 signext %x, i4 signext %y, i4 signext %z) nounwind {
; X64-NEXT: cmpb $7, %al
; X64-NEXT: movl $7, %ecx
; X64-NEXT: cmovll %eax, %ecx
-; X64-NEXT: cmpb $-8, %cl
+; X64-NEXT: cmpb $-7, %cl
; X64-NEXT: movl $248, %eax
-; X64-NEXT: cmovgl %ecx, %eax
+; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: movsbl %al, %eax
; X64-NEXT: retq
%a = mul i4 %y, %z
diff --git a/llvm/test/CodeGen/X86/sdiv_fix_sat.ll b/llvm/test/CodeGen/X86/sdiv_fix_sat.ll
index f22812c148355..26cbe90d8759c 100644
--- a/llvm/test/CodeGen/X86/sdiv_fix_sat.ll
+++ b/llvm/test/CodeGen/X86/sdiv_fix_sat.ll
@@ -33,9 +33,9 @@ define i16 @func(i16 %x, i16 %y) nounwind {
; X64-NEXT: cmpl $65535, %edi # imm = 0xFFFF
; X64-NEXT: movl $65535, %ecx # imm = 0xFFFF
; X64-NEXT: cmovll %edi, %ecx
-; X64-NEXT: cmpl $-65536, %ecx # imm = 0xFFFF0000
+; X64-NEXT: cmpl $-65535, %ecx # imm = 0xFFFF0001
; X64-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
-; X64-NEXT: cmovgl %ecx, %eax
+; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: shrl %eax
; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq
@@ -64,9 +64,9 @@ define i16 @func(i16 %x, i16 %y) nounwind {
; X86-NEXT: cmpl $65535, %edi # imm = 0xFFFF
; X86-NEXT: movl $65535, %ecx # imm = 0xFFFF
; X86-NEXT: cmovll %edi, %ecx
-; X86-NEXT: cmpl $-65536, %ecx # imm = 0xFFFF0000
+; X86-NEXT: cmpl $-65535, %ecx # imm = 0xFFFF0001
; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
-; X86-NEXT: cmovgl %ecx, %eax
+; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: shrl %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: popl %esi
@@ -103,9 +103,9 @@ define i16 @func2(i8 %x, i8 %y) nounwind {
; X64-NEXT: cmpl $16383, %edi # imm = 0x3FFF
; X64-NEXT: movl $16383, %ecx # imm = 0x3FFF
; X64-NEXT: cmovll %edi, %ecx
-; X64-NEXT: cmpl $-16384, %ecx # imm = 0xC000
+; X64-NEXT: cmpl $-16383, %ecx # imm = 0xC001
; X64-NEXT: movl $-16384, %eax # imm = 0xC000
-; X64-NEXT: cmovgl %ecx, %eax
+; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq
;
@@ -133,9 +133,9 @@ define i16 @func2(i8 %x, i8 %y) nounwind {
; X86-NEXT: cmpl $16383, %edi # imm = 0x3FFF
; X86-NEXT: movl $16383, %ecx # imm = 0x3FFF
; X86-NEXT: cmovll %edi, %ecx
-; X86-NEXT: cmpl $-16384, %ecx # imm = 0xC000
+; X86-NEXT: cmpl $-16383, %ecx # imm = 0xC001
; X86-NEXT: movl $-16384, %eax # imm = 0xC000
-; X86-NEXT: cmovgl %ecx, %eax
+; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
@@ -175,9 +175,9 @@ define i16 @func3(i15 %x, i8 %y) nounwind {
; X64-NEXT: movl $16383, %ecx # imm = 0x3FFF
; X64-NEXT: cmovll %esi, %ecx
; X64-NEXT: movswl %cx, %eax
-; X64-NEXT: cmpl $-16384, %eax # imm = 0xC000
+; X64-NEXT: cmpl $-16383, %eax # imm = 0xC001
; X64-NEXT: movl $49152, %eax # imm = 0xC000
-; X64-NEXT: cmovgl %ecx, %eax
+; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq
;
@@ -210,9 +210,9 @@ define i16 @func3(i15 %x, i8 %y) nounwind {
; X86-NEXT: movl $16383, %ecx # imm = 0x3FFF
; X86-NEXT: cmovll %edi, %ecx
; X86-NEXT: movswl %cx, %eax
-; X86-NEXT: cmpl $-16384, %eax # imm = 0xC000
+; X86-NEXT: cmpl $-16383, %eax # imm = 0xC001
; X86-NEXT: movl $49152, %eax # imm = 0xC000
-; X86-NEXT: cmovgl %ecx, %eax
+; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
@@ -253,9 +253,9 @@ define i4 @func4(i4 %x, i4 %y) nounwind {
; X64-NEXT: cmpb $7, %dil
; X64-NEXT: movl $7, %ecx
; X64-NEXT: cmovll %edi, %ecx
-; X64-NEXT: cmpb $-8, %cl
+; X64-NEXT: cmpb $-7, %cl
; X64-NEXT: movl $248, %eax
-; X64-NEXT: cmovgl %ecx, %eax
+; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: popq %rbx
; X64-NEXT: retq
@@ -288,9 +288,9 @@ define i4 @func4(i4 %x, i4 %y) nounwind {
; X86-NEXT: cmpb $7, %al
; X86-NEXT: movl $7, %ecx
; X86-NEXT: cmovll %eax, %ecx
-; X86-NEXT: cmpb $-8, %cl
+; X86-NEXT: cmpb $-7, %cl
; X86-NEXT: movl $248, %eax
-; X86-NEXT: cmovgl %ecx, %eax
+; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: popl %esi
; X86-NEXT: retl
@@ -351,8 +351,8 @@ define i64 @func5(i64 %x, i64 %y) nounwind {
; X64-NEXT: cmovgq %rcx, %rbx
; X64-NEXT: testq %rbp, %rbp
; X64-NEXT: cmovnsq %rbp, %rcx
-; X64-NEXT: cmpq $-2, %rbp
-; X64-NEXT: cmovleq %rax, %rbx
+; X64-NEXT: cmpq $-1, %rbp
+; X64-NEXT: cmovlq %rax, %rbx
; X64-NEXT: shrdq $1, %rcx, %rbx
; X64-NEXT: movq %rbx, %rax
; X64-NEXT: addq $24, %rsp
@@ -473,9 +473,9 @@ define i64 @func5(i64 %x, i64 %y) nounwind {
; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: cmovnel %eax, %esi
; X86-NEXT: cmovnel {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
-; X86-NEXT: cmpl $-2147483648, %edx # imm = 0x80000000
+; X86-NEXT: cmpl $-2147483647, %edx # imm = 0x80000001
; X86-NEXT: movl $-2147483648, %eax # imm = 0x80000000
-; X86-NEXT: cmoval %edx, %eax
+; X86-NEXT: cmovael %edx, %eax
; X86-NEXT: movl %edx, %ecx
; X86-NEXT: sarl $31, %ecx
; X86-NEXT: andl %esi, %ecx
@@ -523,9 +523,9 @@ define i18 @func6(i16 %x, i16 %y) nounwind {
; X64-NEXT: cmpl $131071, %edi # imm = 0x1FFFF
; X64-NEXT: movl $131071, %ecx # imm = 0x1FFFF
; X64-NEXT: cmovll %edi, %ecx
-; X64-NEXT: cmpl $-131072, %ecx # imm = 0xFFFE0000
+; X64-NEXT: cmpl $-131071, %ecx # imm = 0xFFFE0001
; X64-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
-; X64-NEXT: cmovgl %ecx, %eax
+; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: retq
;
; X86-LABEL: func6:
@@ -552,9 +552,9 @@ define i18 @func6(i16 %x, i16 %y) nounwind {
; X86-NEXT: cmpl $131071, %edi # imm = 0x1FFFF
; X86-NEXT: movl $131071, %ecx # imm = 0x1FFFF
; X86-NEXT: cmovll %edi, %ecx
-; X86-NEXT: cmpl $-131072, %ecx # imm = 0xFFFE0000
+; X86-NEXT: cmpl $-131071, %ecx # imm = 0xFFFE0001
; X86-NEXT: movl $-131072, %eax # imm = 0xFFFE0000
-; X86-NEXT: cmovgl %ecx, %eax
+; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx
diff --git a/llvm/test/CodeGen/X86/select.ll b/llvm/test/CodeGen/X86/select.ll
index 1ef10c894a019..7f66b456d576c 100644
--- a/llvm/test/CodeGen/X86/select.ll
+++ b/llvm/test/CodeGen/X86/select.ll
@@ -1202,9 +1202,9 @@ define void @clamp_i8(i32 %src, i8* %dst) {
define void @clamp(i32 %src, i16* %dst) {
; GENERIC-LABEL: clamp:
; GENERIC: ## %bb.0:
-; GENERIC-NEXT: cmpl $32767, %edi ## imm = 0x7FFF
+; GENERIC-NEXT: cmpl $32768, %edi ## imm = 0x8000
; GENERIC-NEXT: movl $32767, %eax ## imm = 0x7FFF
-; GENERIC-NEXT: cmovlel %edi, %eax
+; GENERIC-NEXT: cmovll %edi, %eax
; GENERIC-NEXT: cmpl $-32768, %eax ## imm = 0x8000
; GENERIC-NEXT: movl $32768, %ecx ## imm = 0x8000
; GENERIC-NEXT: cmovgel %eax, %ecx
@@ -1213,10 +1213,10 @@ define void @clamp(i32 %src, i16* %dst) {
;
; ATOM-LABEL: clamp:
; ATOM: ## %bb.0:
-; ATOM-NEXT: cmpl $32767, %edi ## imm = 0x7FFF
+; ATOM-NEXT: cmpl $32768, %edi ## imm = 0x8000
; ATOM-NEXT: movl $32767, %eax ## imm = 0x7FFF
; ATOM-NEXT: movl $32768, %ecx ## imm = 0x8000
-; ATOM-NEXT: cmovlel %edi, %eax
+; ATOM-NEXT: cmovll %edi, %eax
; ATOM-NEXT: cmpl $-32768, %eax ## imm = 0x8000
; ATOM-NEXT: cmovgel %eax, %ecx
; ATOM-NEXT: movw %cx, (%rsi)
@@ -1226,9 +1226,9 @@ define void @clamp(i32 %src, i16* %dst) {
; ATHLON: ## %bb.0:
; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; ATHLON-NEXT: cmpl $32767, %ecx ## imm = 0x7FFF
+; ATHLON-NEXT: cmpl $32768, %ecx ## imm = 0x8000
; ATHLON-NEXT: movl $32767, %edx ## imm = 0x7FFF
-; ATHLON-NEXT: cmovlel %ecx, %edx
+; ATHLON-NEXT: cmovll %ecx, %edx
; ATHLON-NEXT: cmpl $-32768, %edx ## imm = 0x8000
; ATHLON-NEXT: movl $32768, %ecx ## imm = 0x8000
; ATHLON-NEXT: cmovgel %edx, %ecx
@@ -1237,9 +1237,9 @@ define void @clamp(i32 %src, i16* %dst) {
;
; MCU-LABEL: clamp:
; MCU: # %bb.0:
-; MCU-NEXT: cmpl $32767, %eax # imm = 0x7FFF
+; MCU-NEXT: cmpl $32768, %eax # imm = 0x8000
; MCU-NEXT: movl $32767, %ecx # imm = 0x7FFF
-; MCU-NEXT: jg .LBB22_2
+; MCU-NEXT: jge .LBB22_2
; MCU-NEXT: # %bb.1:
; MCU-NEXT: movl %eax, %ecx
; MCU-NEXT: .LBB22_2:
diff --git a/llvm/test/CodeGen/X86/select_const.ll b/llvm/test/CodeGen/X86/select_const.ll
index 852032ad268d5..32a827f4160ec 100644
--- a/llvm/test/CodeGen/X86/select_const.ll
+++ b/llvm/test/CodeGen/X86/select_const.ll
@@ -267,8 +267,8 @@ define i64 @sel_1_2(i64 %x, i64 %y) {
define i8 @sel_1_neg1(i32 %x) {
; CHECK-LABEL: sel_1_neg1:
; CHECK: # %bb.0:
-; CHECK-NEXT: cmpl $42, %edi
-; CHECK-NEXT: setg %al
+; CHECK-NEXT: cmpl $43, %edi
+; CHECK-NEXT: setge %al
; CHECK-NEXT: shlb $2, %al
; CHECK-NEXT: decb %al
; CHECK-NEXT: retq
@@ -299,8 +299,8 @@ define i32 @sel_1_neg1_32(i32 %x) {
; CHECK-LABEL: sel_1_neg1_32:
; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: cmpl $42, %edi
-; CHECK-NEXT: setg %al
+; CHECK-NEXT: cmpl $43, %edi
+; CHECK-NEXT: setge %al
; CHECK-NEXT: leal -1(%rax,%rax,8), %eax
; CHECK-NEXT: retq
%cmp = icmp sgt i32 %x, 42
@@ -378,10 +378,10 @@ define i64 @select_pow2_
diff _neg_invert(i1 zeroext %cond) {
define i8 @sel_67_neg125(i32 %x) {
; CHECK-LABEL: sel_67_neg125:
; CHECK: # %bb.0:
-; CHECK-NEXT: cmpl $42, %edi
+; CHECK-NEXT: cmpl $43, %edi
; CHECK-NEXT: movl $67, %ecx
; CHECK-NEXT: movl $131, %eax
-; CHECK-NEXT: cmovgl %ecx, %eax
+; CHECK-NEXT: cmovgel %ecx, %eax
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: retq
%cmp = icmp sgt i32 %x, 42
diff --git a/llvm/test/CodeGen/X86/setcc-logic.ll b/llvm/test/CodeGen/X86/setcc-logic.ll
index c82a7df7b3e5a..3e7d7d32e0e76 100644
--- a/llvm/test/CodeGen/X86/setcc-logic.ll
+++ b/llvm/test/CodeGen/X86/setcc-logic.ll
@@ -456,8 +456,8 @@ define zeroext i1 @ne_neg1_and_ne_zero(i64 %x) nounwind {
; CHECK-LABEL: ne_neg1_and_ne_zero:
; CHECK: # %bb.0:
; CHECK-NEXT: incq %rdi
-; CHECK-NEXT: cmpq $1, %rdi
-; CHECK-NEXT: seta %al
+; CHECK-NEXT: cmpq $2, %rdi
+; CHECK-NEXT: setae %al
; CHECK-NEXT: retq
%cmp1 = icmp ne i64 %x, -1
%cmp2 = icmp ne i64 %x, 0
diff --git a/llvm/test/CodeGen/X86/setcc.ll b/llvm/test/CodeGen/X86/setcc.ll
index 3a386da4503ee..2bbc9ffe6168f 100644
--- a/llvm/test/CodeGen/X86/setcc.ll
+++ b/llvm/test/CodeGen/X86/setcc.ll
@@ -6,8 +6,8 @@ define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
; CHECK-LABEL: t1:
; CHECK: ## %bb.0:
; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: cmpw $26, %di
-; CHECK-NEXT: seta %al
+; CHECK-NEXT: cmpw $27, %di
+; CHECK-NEXT: setae %al
; CHECK-NEXT: shll $5, %eax
; CHECK-NEXT: retq
%t0 = icmp ugt i16 %x, 26
diff --git a/llvm/test/CodeGen/X86/smul_fix_sat.ll b/llvm/test/CodeGen/X86/smul_fix_sat.ll
index 4d60536636596..757763d407b24 100644
--- a/llvm/test/CodeGen/X86/smul_fix_sat.ll
+++ b/llvm/test/CodeGen/X86/smul_fix_sat.ll
@@ -16,9 +16,9 @@ define i32 @func(i32 %x, i32 %y) nounwind {
; X64-NEXT: movq %rcx, %rax
; X64-NEXT: shrq $32, %rax
; X64-NEXT: shrdl $2, %eax, %ecx
-; X64-NEXT: cmpl $1, %eax
+; X64-NEXT: cmpl $2, %eax
; X64-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
-; X64-NEXT: cmovlel %ecx, %edx
+; X64-NEXT: cmovll %ecx, %edx
; X64-NEXT: cmpl $-2, %eax
; X64-NEXT: movl $-2147483648, %eax # imm = 0x80000000
; X64-NEXT: cmovgel %edx, %eax
@@ -29,9 +29,9 @@ define i32 @func(i32 %x, i32 %y) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: imull {{[0-9]+}}(%esp)
; X86-NEXT: shrdl $2, %edx, %eax
-; X86-NEXT: cmpl $1, %edx
+; X86-NEXT: cmpl $2, %edx
; X86-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF
-; X86-NEXT: cmovgl %ecx, %eax
+; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: cmpl $-2, %edx
; X86-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
; X86-NEXT: cmovll %ecx, %eax
@@ -46,9 +46,9 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: imulq %rsi
; X64-NEXT: shrdq $2, %rdx, %rax
-; X64-NEXT: cmpq $1, %rdx
+; X64-NEXT: cmpq $2, %rdx
; X64-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
-; X64-NEXT: cmovgq %rcx, %rax
+; X64-NEXT: cmovgeq %rcx, %rax
; X64-NEXT: cmpq $-2, %rdx
; X64-NEXT: movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
; X64-NEXT: cmovlq %rcx, %rax
@@ -100,8 +100,8 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
; X86-NEXT: testl %esi, %esi
; X86-NEXT: setg %bl
; X86-NEXT: sete %bh
-; X86-NEXT: cmpl $1, %ebp
-; X86-NEXT: seta %dl
+; X86-NEXT: cmpl $2, %ebp
+; X86-NEXT: setae %dl
; X86-NEXT: andb %bh, %dl
; X86-NEXT: orb %bl, %dl
; X86-NEXT: shrdl $2, %eax, %ecx
@@ -148,9 +148,9 @@ define i4 @func3(i4 %x, i4 %y) nounwind {
; X64-NEXT: shlb $6, %dl
; X64-NEXT: orb %al, %dl
; X64-NEXT: movzbl %dl, %eax
-; X64-NEXT: cmpb $1, %cl
+; X64-NEXT: cmpb $2, %cl
; X64-NEXT: movl $127, %edx
-; X64-NEXT: cmovlel %eax, %edx
+; X64-NEXT: cmovll %eax, %edx
; X64-NEXT: cmpb $-2, %cl
; X64-NEXT: movl $128, %eax
; X64-NEXT: cmovgel %edx, %eax
@@ -173,9 +173,9 @@ define i4 @func3(i4 %x, i4 %y) nounwind {
; X86-NEXT: shrb $2, %al
; X86-NEXT: orb %cl, %al
; X86-NEXT: movzbl %al, %ecx
-; X86-NEXT: cmpb $1, %ah
+; X86-NEXT: cmpb $2, %ah
; X86-NEXT: movl $127, %edx
-; X86-NEXT: cmovlel %ecx, %edx
+; X86-NEXT: cmovll %ecx, %edx
; X86-NEXT: cmpb $-2, %ah
; X86-NEXT: movl $128, %eax
; X86-NEXT: cmovgel %edx, %eax
@@ -199,9 +199,9 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: shrq $32, %rcx
; X64-NEXT: shrdl $2, %ecx, %edx
-; X64-NEXT: cmpl $1, %ecx
+; X64-NEXT: cmpl $2, %ecx
; X64-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmovgl %eax, %edx
+; X64-NEXT: cmovgel %eax, %edx
; X64-NEXT: cmpl $-2, %ecx
; X64-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
; X64-NEXT: cmovll %ecx, %edx
@@ -216,8 +216,8 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-NEXT: movq %rsi, %rdx
; X64-NEXT: shrq $32, %rdx
; X64-NEXT: shrdl $2, %edx, %esi
-; X64-NEXT: cmpl $1, %edx
-; X64-NEXT: cmovgl %eax, %esi
+; X64-NEXT: cmpl $2, %edx
+; X64-NEXT: cmovgel %eax, %esi
; X64-NEXT: cmpl $-2, %edx
; X64-NEXT: cmovll %ecx, %esi
; X64-NEXT: movd %esi, %xmm3
@@ -230,8 +230,8 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-NEXT: movq %rsi, %rdx
; X64-NEXT: shrq $32, %rdx
; X64-NEXT: shrdl $2, %edx, %esi
-; X64-NEXT: cmpl $1, %edx
-; X64-NEXT: cmovgl %eax, %esi
+; X64-NEXT: cmpl $2, %edx
+; X64-NEXT: cmovgel %eax, %esi
; X64-NEXT: cmpl $-2, %edx
; X64-NEXT: cmovll %ecx, %esi
; X64-NEXT: movd %esi, %xmm2
@@ -245,8 +245,8 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-NEXT: movq %rsi, %rdx
; X64-NEXT: shrq $32, %rdx
; X64-NEXT: shrdl $2, %edx, %esi
-; X64-NEXT: cmpl $1, %edx
-; X64-NEXT: cmovgl %eax, %esi
+; X64-NEXT: cmpl $2, %edx
+; X64-NEXT: cmovgel %eax, %esi
; X64-NEXT: cmpl $-2, %edx
; X64-NEXT: cmovll %ecx, %esi
; X64-NEXT: movd %esi, %xmm0
@@ -267,9 +267,9 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X86-NEXT: imull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shrdl $2, %edx, %ecx
-; X86-NEXT: cmpl $1, %edx
+; X86-NEXT: cmpl $2, %edx
; X86-NEXT: movl $2147483647, %ebp # imm = 0x7FFFFFFF
-; X86-NEXT: cmovgl %ebp, %ecx
+; X86-NEXT: cmovgel %ebp, %ecx
; X86-NEXT: cmpl $-2, %edx
; X86-NEXT: movl $-2147483648, %esi # imm = 0x80000000
; X86-NEXT: cmovll %esi, %ecx
@@ -277,23 +277,23 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X86-NEXT: imull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %edi
; X86-NEXT: shrdl $2, %edx, %edi
-; X86-NEXT: cmpl $1, %edx
-; X86-NEXT: cmovgl %ebp, %edi
+; X86-NEXT: cmpl $2, %edx
+; X86-NEXT: cmovgel %ebp, %edi
; X86-NEXT: cmpl $-2, %edx
; X86-NEXT: cmovll %esi, %edi
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: imull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: shrdl $2, %edx, %ebx
-; X86-NEXT: cmpl $1, %edx
-; X86-NEXT: cmovgl %ebp, %ebx
+; X86-NEXT: cmpl $2, %edx
+; X86-NEXT: cmovgel %ebp, %ebx
; X86-NEXT: cmpl $-2, %edx
; X86-NEXT: cmovll %esi, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: imull {{[0-9]+}}(%esp)
; X86-NEXT: shrdl $2, %edx, %eax
-; X86-NEXT: cmpl $1, %edx
-; X86-NEXT: cmovgl %ebp, %eax
+; X86-NEXT: cmpl $2, %edx
+; X86-NEXT: cmovgel %ebp, %eax
; X86-NEXT: cmpl $-2, %edx
; X86-NEXT: cmovll %esi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
@@ -713,11 +713,11 @@ define i64 @func8(i64 %x, i64 %y) nounwind {
; X86-NEXT: cmovnsl %ecx, %edx
; X86-NEXT: shrdl $31, %edx, %eax
; X86-NEXT: shrdl $31, %edi, %edx
-; X86-NEXT: cmpl $1073741823, %edi # imm = 0x3FFFFFFF
+; X86-NEXT: cmpl $1073741824, %edi # imm = 0x40000000
; X86-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF
-; X86-NEXT: cmovgl %ecx, %edx
+; X86-NEXT: cmovgel %ecx, %edx
; X86-NEXT: movl $-1, %ecx
-; X86-NEXT: cmovgl %ecx, %eax
+; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: xorl %ecx, %ecx
; X86-NEXT: cmpl $-1073741824, %edi # imm = 0xC0000000
; X86-NEXT: cmovll %ecx, %eax
diff --git a/llvm/test/CodeGen/X86/smul_fix_sat_constants.ll b/llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
index b8a46567e75b6..af8353c5a5653 100644
--- a/llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
+++ b/llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
@@ -15,10 +15,10 @@ define i64 @func() nounwind {
; X64-NEXT: movl $2, %ecx
; X64-NEXT: movl $3, %eax
; X64-NEXT: imulq %rcx
-; X64-NEXT: cmpq $1, %rdx
+; X64-NEXT: cmpq $2, %rdx
; X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
; X64-NEXT: movl $1, %ecx
-; X64-NEXT: cmovgq %rax, %rcx
+; X64-NEXT: cmovgeq %rax, %rcx
; X64-NEXT: cmpq $-2, %rdx
; X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
; X64-NEXT: cmovgeq %rcx, %rax
@@ -51,9 +51,9 @@ define i64 @func3() nounwind {
; X64-NEXT: movl $2, %edx
; X64-NEXT: movq %rcx, %rax
; X64-NEXT: imulq %rdx
-; X64-NEXT: cmpq $1, %rdx
+; X64-NEXT: cmpq $2, %rdx
; X64-NEXT: movabsq $4611686018427387903, %rsi # imm = 0x3FFFFFFFFFFFFFFF
-; X64-NEXT: cmovgq %rcx, %rsi
+; X64-NEXT: cmovgeq %rcx, %rsi
; X64-NEXT: cmpq $-2, %rdx
; X64-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
; X64-NEXT: cmovgeq %rsi, %rax
diff --git a/llvm/test/CodeGen/X86/srem-seteq.ll b/llvm/test/CodeGen/X86/srem-seteq.ll
index 67fe5f4c5e447..dfa1472b62fe5 100644
--- a/llvm/test/CodeGen/X86/srem-seteq.ll
+++ b/llvm/test/CodeGen/X86/srem-seteq.ll
@@ -116,8 +116,8 @@ define i16 @test_srem_even(i16 %X) nounwind {
; X86-NEXT: rorw %ax
; X86-NEXT: movzwl %ax, %ecx
; X86-NEXT: xorl %eax, %eax
-; X86-NEXT: cmpl $4680, %ecx # imm = 0x1248
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $4681, %ecx # imm = 0x1249
+; X86-NEXT: setae %al
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
;
@@ -128,8 +128,8 @@ define i16 @test_srem_even(i16 %X) nounwind {
; X64-NEXT: rorw %ax
; X64-NEXT: movzwl %ax, %ecx
; X64-NEXT: xorl %eax, %eax
-; X64-NEXT: cmpl $4680, %ecx # imm = 0x1248
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $4681, %ecx # imm = 0x1249
+; X64-NEXT: setae %al
; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq
%srem = srem i16 %X, 14
@@ -229,8 +229,8 @@ define i32 @test_srem_odd_setne(i32 %X) nounwind {
; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
; X86-NEXT: addl $429496729, %ecx # imm = 0x19999999
; X86-NEXT: xorl %eax, %eax
-; X86-NEXT: cmpl $858993458, %ecx # imm = 0x33333332
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $858993459, %ecx # imm = 0x33333333
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: test_srem_odd_setne:
@@ -238,8 +238,8 @@ define i32 @test_srem_odd_setne(i32 %X) nounwind {
; X64-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
; X64-NEXT: addl $429496729, %ecx # imm = 0x19999999
; X64-NEXT: xorl %eax, %eax
-; X64-NEXT: cmpl $858993458, %ecx # imm = 0x33333332
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $858993459, %ecx # imm = 0x33333333
+; X64-NEXT: setae %al
; X64-NEXT: retq
%srem = srem i32 %X, 5
%cmp = icmp ne i32 %srem, 0
@@ -254,8 +254,8 @@ define i32 @test_srem_negative_odd(i32 %X) nounwind {
; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
; X86-NEXT: addl $429496729, %ecx # imm = 0x19999999
; X86-NEXT: xorl %eax, %eax
-; X86-NEXT: cmpl $858993458, %ecx # imm = 0x33333332
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $858993459, %ecx # imm = 0x33333333
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: test_srem_negative_odd:
@@ -263,8 +263,8 @@ define i32 @test_srem_negative_odd(i32 %X) nounwind {
; X64-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
; X64-NEXT: addl $429496729, %ecx # imm = 0x19999999
; X64-NEXT: xorl %eax, %eax
-; X64-NEXT: cmpl $858993458, %ecx # imm = 0x33333332
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $858993459, %ecx # imm = 0x33333333
+; X64-NEXT: setae %al
; X64-NEXT: retq
%srem = srem i32 %X, -5
%cmp = icmp ne i32 %srem, 0
@@ -278,8 +278,8 @@ define i32 @test_srem_negative_even(i32 %X) nounwind {
; X86-NEXT: addl $306783378, %ecx # imm = 0x12492492
; X86-NEXT: rorl %ecx
; X86-NEXT: xorl %eax, %eax
-; X86-NEXT: cmpl $306783378, %ecx # imm = 0x12492492
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $306783379, %ecx # imm = 0x12492493
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: test_srem_negative_even:
@@ -288,8 +288,8 @@ define i32 @test_srem_negative_even(i32 %X) nounwind {
; X64-NEXT: addl $306783378, %ecx # imm = 0x12492492
; X64-NEXT: rorl %ecx
; X64-NEXT: xorl %eax, %eax
-; X64-NEXT: cmpl $306783378, %ecx # imm = 0x12492492
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $306783379, %ecx # imm = 0x12492493
+; X64-NEXT: setae %al
; X64-NEXT: retq
%srem = srem i32 %X, -14
%cmp = icmp ne i32 %srem, 0
diff --git a/llvm/test/CodeGen/X86/ssub_sat.ll b/llvm/test/CodeGen/X86/ssub_sat.ll
index 0a72b8a01b612..bdb45877c913b 100644
--- a/llvm/test/CodeGen/X86/ssub_sat.ll
+++ b/llvm/test/CodeGen/X86/ssub_sat.ll
@@ -140,9 +140,9 @@ define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {
; X86-NEXT: cmpb $7, %al
; X86-NEXT: movl $7, %eax
; X86-NEXT: cmovll %ecx, %eax
-; X86-NEXT: cmpb $-8, %al
+; X86-NEXT: cmpb $-7, %al
; X86-NEXT: movl $248, %ecx
-; X86-NEXT: cmovgl %eax, %ecx
+; X86-NEXT: cmovgel %eax, %ecx
; X86-NEXT: movsbl %cl, %eax
; X86-NEXT: retl
;
@@ -153,9 +153,9 @@ define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {
; X64-NEXT: cmpb $7, %al
; X64-NEXT: movl $7, %ecx
; X64-NEXT: cmovll %eax, %ecx
-; X64-NEXT: cmpb $-8, %cl
+; X64-NEXT: cmpb $-7, %cl
; X64-NEXT: movl $248, %eax
-; X64-NEXT: cmovgl %ecx, %eax
+; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: movsbl %al, %eax
; X64-NEXT: retq
%tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %y)
diff --git a/llvm/test/CodeGen/X86/ssub_sat_plus.ll b/llvm/test/CodeGen/X86/ssub_sat_plus.ll
index 8f2774b27a14b..dc0804994a777 100644
--- a/llvm/test/CodeGen/X86/ssub_sat_plus.ll
+++ b/llvm/test/CodeGen/X86/ssub_sat_plus.ll
@@ -155,9 +155,9 @@ define signext i4 @func4(i4 signext %x, i4 signext %y, i4 signext %z) nounwind {
; X86-NEXT: cmpb $7, %cl
; X86-NEXT: movl $7, %ecx
; X86-NEXT: cmovll %eax, %ecx
-; X86-NEXT: cmpb $-8, %cl
+; X86-NEXT: cmpb $-7, %cl
; X86-NEXT: movl $248, %eax
-; X86-NEXT: cmovgl %ecx, %eax
+; X86-NEXT: cmovgel %ecx, %eax
; X86-NEXT: movsbl %al, %eax
; X86-NEXT: retl
;
@@ -173,9 +173,9 @@ define signext i4 @func4(i4 signext %x, i4 signext %y, i4 signext %z) nounwind {
; X64-NEXT: cmpb $7, %al
; X64-NEXT: movl $7, %ecx
; X64-NEXT: cmovll %eax, %ecx
-; X64-NEXT: cmpb $-8, %cl
+; X64-NEXT: cmpb $-7, %cl
; X64-NEXT: movl $248, %eax
-; X64-NEXT: cmovgl %ecx, %eax
+; X64-NEXT: cmovgel %ecx, %eax
; X64-NEXT: movsbl %al, %eax
; X64-NEXT: retq
%a = mul i4 %y, %z
diff --git a/llvm/test/CodeGen/X86/umul_fix_sat.ll b/llvm/test/CodeGen/X86/umul_fix_sat.ll
index 8a4331a998d96..ad980b961bc6a 100644
--- a/llvm/test/CodeGen/X86/umul_fix_sat.ll
+++ b/llvm/test/CodeGen/X86/umul_fix_sat.ll
@@ -16,9 +16,9 @@ define i32 @func(i32 %x, i32 %y) nounwind {
; X64-NEXT: movq %rcx, %rax
; X64-NEXT: shrq $32, %rax
; X64-NEXT: shrdl $2, %eax, %ecx
-; X64-NEXT: cmpl $3, %eax
+; X64-NEXT: cmpl $4, %eax
; X64-NEXT: movl $-1, %eax
-; X64-NEXT: cmovbel %ecx, %eax
+; X64-NEXT: cmovbl %ecx, %eax
; X64-NEXT: retq
;
; X86-LABEL: func:
@@ -26,9 +26,9 @@ define i32 @func(i32 %x, i32 %y) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: shrdl $2, %edx, %eax
-; X86-NEXT: cmpl $3, %edx
+; X86-NEXT: cmpl $4, %edx
; X86-NEXT: movl $-1, %ecx
-; X86-NEXT: cmoval %ecx, %eax
+; X86-NEXT: cmovael %ecx, %eax
; X86-NEXT: retl
%tmp = call i32 @llvm.umul.fix.sat.i32(i32 %x, i32 %y, i32 2)
ret i32 %tmp
@@ -40,9 +40,9 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rsi
; X64-NEXT: shrdq $2, %rdx, %rax
-; X64-NEXT: cmpq $3, %rdx
+; X64-NEXT: cmpq $4, %rdx
; X64-NEXT: movq $-1, %rcx
-; X64-NEXT: cmovaq %rcx, %rax
+; X64-NEXT: cmovaeq %rcx, %rax
; X64-NEXT: retq
;
; X86-LABEL: func2:
@@ -105,9 +105,9 @@ define i4 @func3(i4 %x, i4 %y) nounwind {
; X64-NEXT: shlb $6, %dl
; X64-NEXT: orb %cl, %dl
; X64-NEXT: movzbl %dl, %ecx
-; X64-NEXT: cmpb $3, %al
+; X64-NEXT: cmpb $4, %al
; X64-NEXT: movl $255, %eax
-; X64-NEXT: cmovbel %ecx, %eax
+; X64-NEXT: cmovbl %ecx, %eax
; X64-NEXT: shrb $4, %al
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
@@ -126,9 +126,9 @@ define i4 @func3(i4 %x, i4 %y) nounwind {
; X86-NEXT: shrb $2, %al
; X86-NEXT: orb %cl, %al
; X86-NEXT: movzbl %al, %ecx
-; X86-NEXT: cmpb $3, %ah
+; X86-NEXT: cmpb $4, %ah
; X86-NEXT: movl $255, %eax
-; X86-NEXT: cmovbel %ecx, %eax
+; X86-NEXT: cmovbl %ecx, %eax
; X86-NEXT: shrb $4, %al
; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: retl
@@ -147,9 +147,9 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-NEXT: movq %rcx, %rax
; X64-NEXT: shrq $32, %rax
; X64-NEXT: shrdl $2, %eax, %ecx
-; X64-NEXT: cmpl $3, %eax
+; X64-NEXT: cmpl $4, %eax
; X64-NEXT: movl $-1, %eax
-; X64-NEXT: cmoval %eax, %ecx
+; X64-NEXT: cmovael %eax, %ecx
; X64-NEXT: movd %ecx, %xmm2
; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
; X64-NEXT: movd %xmm3, %ecx
@@ -159,8 +159,8 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: shrq $32, %rcx
; X64-NEXT: shrdl $2, %ecx, %edx
-; X64-NEXT: cmpl $3, %ecx
-; X64-NEXT: cmoval %eax, %edx
+; X64-NEXT: cmpl $4, %ecx
+; X64-NEXT: cmovael %eax, %edx
; X64-NEXT: movd %edx, %xmm3
; X64-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; X64-NEXT: movd %xmm1, %ecx
@@ -169,8 +169,8 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: shrq $32, %rcx
; X64-NEXT: shrdl $2, %ecx, %edx
-; X64-NEXT: cmpl $3, %ecx
-; X64-NEXT: cmoval %eax, %edx
+; X64-NEXT: cmpl $4, %ecx
+; X64-NEXT: cmovael %eax, %edx
; X64-NEXT: movd %edx, %xmm2
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
; X64-NEXT: movd %xmm1, %ecx
@@ -180,8 +180,8 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: shrq $32, %rcx
; X64-NEXT: shrdl $2, %ecx, %edx
-; X64-NEXT: cmpl $3, %ecx
-; X64-NEXT: cmoval %eax, %edx
+; X64-NEXT: cmpl $4, %ecx
+; X64-NEXT: cmovael %eax, %edx
; X64-NEXT: movd %edx, %xmm0
; X64-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
@@ -201,26 +201,26 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %esi
; X86-NEXT: shrdl $2, %edx, %esi
-; X86-NEXT: cmpl $3, %edx
+; X86-NEXT: cmpl $4, %edx
; X86-NEXT: movl $-1, %ecx
-; X86-NEXT: cmoval %ecx, %esi
+; X86-NEXT: cmovael %ecx, %esi
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ebp
; X86-NEXT: shrdl $2, %edx, %ebp
-; X86-NEXT: cmpl $3, %edx
-; X86-NEXT: cmoval %ecx, %ebp
+; X86-NEXT: cmpl $4, %edx
+; X86-NEXT: cmovael %ecx, %ebp
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: shrdl $2, %edx, %ebx
-; X86-NEXT: cmpl $3, %edx
-; X86-NEXT: cmoval %ecx, %ebx
+; X86-NEXT: cmpl $4, %edx
+; X86-NEXT: cmovael %ecx, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: shrdl $2, %edx, %eax
-; X86-NEXT: cmpl $3, %edx
-; X86-NEXT: cmoval %ecx, %eax
+; X86-NEXT: cmpl $4, %edx
+; X86-NEXT: cmovael %ecx, %eax
; X86-NEXT: movl %eax, 12(%edi)
; X86-NEXT: movl %ebx, 8(%edi)
; X86-NEXT: movl %ebp, 4(%edi)
diff --git a/llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll b/llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll
index ab5371554576b..125fe41ecf805 100644
--- a/llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll
+++ b/llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll
@@ -66,8 +66,8 @@ define i1 @test_urem_odd_setne(i4 %X) nounwind {
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: andb $15, %al
-; X86-NEXT: cmpb $3, %al
-; X86-NEXT: seta %al
+; X86-NEXT: cmpb $4, %al
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: test_urem_odd_setne:
@@ -76,8 +76,8 @@ define i1 @test_urem_odd_setne(i4 %X) nounwind {
; X64-NEXT: leal (%rdi,%rdi,2), %eax
; X64-NEXT: leal (%rdi,%rax,4), %eax
; X64-NEXT: andb $15, %al
-; X64-NEXT: cmpb $3, %al
-; X64-NEXT: seta %al
+; X64-NEXT: cmpb $4, %al
+; X64-NEXT: setae %al
; X64-NEXT: retq
%urem = urem i4 %X, 5
%cmp = icmp ne i4 %urem, 0
@@ -89,16 +89,16 @@ define i1 @test_urem_negative_odd(i9 %X) nounwind {
; X86: # %bb.0:
; X86-NEXT: imull $307, {{[0-9]+}}(%esp), %eax # imm = 0x133
; X86-NEXT: andl $511, %eax # imm = 0x1FF
-; X86-NEXT: cmpw $1, %ax
-; X86-NEXT: seta %al
+; X86-NEXT: cmpw $2, %ax
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: test_urem_negative_odd:
; X64: # %bb.0:
; X64-NEXT: imull $307, %edi, %eax # imm = 0x133
; X64-NEXT: andl $511, %eax # imm = 0x1FF
-; X64-NEXT: cmpw $1, %ax
-; X64-NEXT: seta %al
+; X64-NEXT: cmpw $2, %ax
+; X64-NEXT: setae %al
; X64-NEXT: retq
%urem = urem i9 %X, -5
%cmp = icmp ne i9 %urem, 0
@@ -115,18 +115,18 @@ define <3 x i1> @test_urem_vec(<3 x i11> %X) nounwind {
; X86-NEXT: shrl %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: andl $2047, %eax # imm = 0x7FF
-; X86-NEXT: cmpl $341, %eax # imm = 0x155
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $342, %eax # imm = 0x156
+; X86-NEXT: setae %al
; X86-NEXT: imull $1463, {{[0-9]+}}(%esp), %ecx # imm = 0x5B7
; X86-NEXT: addl $-1463, %ecx # imm = 0xFA49
; X86-NEXT: andl $2047, %ecx # imm = 0x7FF
-; X86-NEXT: cmpl $292, %ecx # imm = 0x124
-; X86-NEXT: seta %dl
+; X86-NEXT: cmpl $293, %ecx # imm = 0x125
+; X86-NEXT: setae %dl
; X86-NEXT: imull $819, {{[0-9]+}}(%esp), %ecx # imm = 0x333
; X86-NEXT: addl $-1638, %ecx # imm = 0xF99A
; X86-NEXT: andl $2047, %ecx # imm = 0x7FF
-; X86-NEXT: cmpw $1, %cx
-; X86-NEXT: seta %cl
+; X86-NEXT: cmpw $2, %cx
+; X86-NEXT: setae %cl
; X86-NEXT: retl
;
; SSE2-LABEL: test_urem_vec:
diff --git a/llvm/test/CodeGen/X86/urem-seteq.ll b/llvm/test/CodeGen/X86/urem-seteq.ll
index 21aed941b06a3..214a5162fd13a 100644
--- a/llvm/test/CodeGen/X86/urem-seteq.ll
+++ b/llvm/test/CodeGen/X86/urem-seteq.ll
@@ -107,8 +107,8 @@ define i16 @test_urem_even(i16 %X) nounwind {
; X86-NEXT: rorw %ax
; X86-NEXT: movzwl %ax, %ecx
; X86-NEXT: xorl %eax, %eax
-; X86-NEXT: cmpl $4681, %ecx # imm = 0x1249
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $4682, %ecx # imm = 0x124A
+; X86-NEXT: setae %al
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
;
@@ -118,8 +118,8 @@ define i16 @test_urem_even(i16 %X) nounwind {
; X64-NEXT: rorw %ax
; X64-NEXT: movzwl %ax, %ecx
; X64-NEXT: xorl %eax, %eax
-; X64-NEXT: cmpl $4681, %ecx # imm = 0x1249
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $4682, %ecx # imm = 0x124A
+; X64-NEXT: setae %al
; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq
%urem = urem i16 %X, 14
@@ -212,16 +212,16 @@ define i32 @test_urem_odd_setne(i32 %X) nounwind {
; X86: # %bb.0:
; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
; X86-NEXT: xorl %eax, %eax
-; X86-NEXT: cmpl $858993459, %ecx # imm = 0x33333333
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $858993460, %ecx # imm = 0x33333334
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: test_urem_odd_setne:
; X64: # %bb.0:
; X64-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
; X64-NEXT: xorl %eax, %eax
-; X64-NEXT: cmpl $858993459, %ecx # imm = 0x33333333
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $858993460, %ecx # imm = 0x33333334
+; X64-NEXT: setae %al
; X64-NEXT: retq
%urem = urem i32 %X, 5
%cmp = icmp ne i32 %urem, 0
@@ -235,16 +235,16 @@ define i32 @test_urem_negative_odd(i32 %X) nounwind {
; X86: # %bb.0:
; X86-NEXT: imull $858993459, {{[0-9]+}}(%esp), %ecx # imm = 0x33333333
; X86-NEXT: xorl %eax, %eax
-; X86-NEXT: cmpl $1, %ecx
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: test_urem_negative_odd:
; X64: # %bb.0:
; X64-NEXT: imull $858993459, %edi, %ecx # imm = 0x33333333
; X64-NEXT: xorl %eax, %eax
-; X64-NEXT: cmpl $1, %ecx
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $2, %ecx
+; X64-NEXT: setae %al
; X64-NEXT: retq
%urem = urem i32 %X, -5
%cmp = icmp ne i32 %urem, 0
@@ -257,8 +257,8 @@ define i32 @test_urem_negative_even(i32 %X) nounwind {
; X86-NEXT: imull $-920350135, {{[0-9]+}}(%esp), %ecx # imm = 0xC9249249
; X86-NEXT: rorl %ecx
; X86-NEXT: xorl %eax, %eax
-; X86-NEXT: cmpl $1, %ecx
-; X86-NEXT: seta %al
+; X86-NEXT: cmpl $2, %ecx
+; X86-NEXT: setae %al
; X86-NEXT: retl
;
; X64-LABEL: test_urem_negative_even:
@@ -266,8 +266,8 @@ define i32 @test_urem_negative_even(i32 %X) nounwind {
; X64-NEXT: imull $-920350135, %edi, %ecx # imm = 0xC9249249
; X64-NEXT: rorl %ecx
; X64-NEXT: xorl %eax, %eax
-; X64-NEXT: cmpl $1, %ecx
-; X64-NEXT: seta %al
+; X64-NEXT: cmpl $2, %ecx
+; X64-NEXT: setae %al
; X64-NEXT: retq
%urem = urem i32 %X, -14
%cmp = icmp ne i32 %urem, 0
diff --git a/llvm/test/CodeGen/X86/vector-mulfix-legalize.ll b/llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
index 0eafd8d644dd1..b1a7a2485701a 100644
--- a/llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
+++ b/llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
@@ -50,9 +50,9 @@ define <4 x i16> @smulfixsat(<4 x i16> %a) {
; CHECK-NEXT: shrl $16, %edx
; CHECK-NEXT: shldw $1, %cx, %dx
; CHECK-NEXT: sarl $16, %ecx
-; CHECK-NEXT: cmpl $16383, %ecx # imm = 0x3FFF
+; CHECK-NEXT: cmpl $16384, %ecx # imm = 0x4000
; CHECK-NEXT: movl $32767, %r8d # imm = 0x7FFF
-; CHECK-NEXT: cmovgl %r8d, %edx
+; CHECK-NEXT: cmovgel %r8d, %edx
; CHECK-NEXT: cmpl $-16384, %ecx # imm = 0xC000
; CHECK-NEXT: movl $32768, %ecx # imm = 0x8000
; CHECK-NEXT: cmovll %ecx, %edx
@@ -63,8 +63,8 @@ define <4 x i16> @smulfixsat(<4 x i16> %a) {
; CHECK-NEXT: leal (%rdi,%rdi), %esi
; CHECK-NEXT: shrdw $15, %ax, %si
; CHECK-NEXT: sarl $15, %edi
-; CHECK-NEXT: cmpl $16383, %edi # imm = 0x3FFF
-; CHECK-NEXT: cmovgl %r8d, %esi
+; CHECK-NEXT: cmpl $16384, %edi # imm = 0x4000
+; CHECK-NEXT: cmovgel %r8d, %esi
; CHECK-NEXT: cmpl $-16384, %edi # imm = 0xC000
; CHECK-NEXT: cmovll %ecx, %esi
; CHECK-NEXT: movd %xmm0, %eax
@@ -73,8 +73,8 @@ define <4 x i16> @smulfixsat(<4 x i16> %a) {
; CHECK-NEXT: shrl $16, %edi
; CHECK-NEXT: shldw $1, %ax, %di
; CHECK-NEXT: sarl $16, %eax
-; CHECK-NEXT: cmpl $16383, %eax # imm = 0x3FFF
-; CHECK-NEXT: cmovgl %r8d, %edi
+; CHECK-NEXT: cmpl $16384, %eax # imm = 0x4000
+; CHECK-NEXT: cmovgel %r8d, %edi
; CHECK-NEXT: cmpl $-16384, %eax # imm = 0xC000
; CHECK-NEXT: cmovll %ecx, %edi
; CHECK-NEXT: movzwl %di, %eax
@@ -88,8 +88,8 @@ define <4 x i16> @smulfixsat(<4 x i16> %a) {
; CHECK-NEXT: leal (,%rax,4), %esi
; CHECK-NEXT: shrdw $15, %dx, %si
; CHECK-NEXT: sarl $14, %eax
-; CHECK-NEXT: cmpl $16383, %eax # imm = 0x3FFF
-; CHECK-NEXT: cmovgl %r8d, %esi
+; CHECK-NEXT: cmpl $16384, %eax # imm = 0x4000
+; CHECK-NEXT: cmovgel %r8d, %esi
; CHECK-NEXT: cmpl $-16384, %eax # imm = 0xC000
; CHECK-NEXT: cmovll %ecx, %esi
; CHECK-NEXT: pinsrw $3, %esi, %xmm1
@@ -109,23 +109,23 @@ define <4 x i16> @umulfixsat(<4 x i16> %a) {
; CHECK-NEXT: shrl $16, %edx
; CHECK-NEXT: movl %edx, %ecx
; CHECK-NEXT: shldw $1, %ax, %cx
-; CHECK-NEXT: cmpl $32767, %edx # imm = 0x7FFF
+; CHECK-NEXT: cmpl $32768, %edx # imm = 0x8000
; CHECK-NEXT: movl $65535, %eax # imm = 0xFFFF
-; CHECK-NEXT: cmoval %eax, %ecx
+; CHECK-NEXT: cmovael %eax, %ecx
; CHECK-NEXT: pextrw $1, %xmm0, %edx
; CHECK-NEXT: addl %edx, %edx
; CHECK-NEXT: movl %edx, %esi
; CHECK-NEXT: shrl $16, %esi
; CHECK-NEXT: movl %esi, %edi
; CHECK-NEXT: shldw $1, %dx, %di
-; CHECK-NEXT: cmpl $32767, %esi # imm = 0x7FFF
-; CHECK-NEXT: cmoval %eax, %edi
+; CHECK-NEXT: cmpl $32768, %esi # imm = 0x8000
+; CHECK-NEXT: cmovael %eax, %edi
; CHECK-NEXT: movd %xmm0, %edx
; CHECK-NEXT: xorl %esi, %esi
; CHECK-NEXT: shldw $1, %dx, %si
-; CHECK-NEXT: movl $32767, %edx # imm = 0x7FFF
+; CHECK-NEXT: movl $32768, %edx # imm = 0x8000
; CHECK-NEXT: negl %edx
-; CHECK-NEXT: cmoval %eax, %esi
+; CHECK-NEXT: cmovael %eax, %esi
; CHECK-NEXT: movzwl %si, %edx
; CHECK-NEXT: movd %edx, %xmm1
; CHECK-NEXT: pinsrw $1, %edi, %xmm1
@@ -136,8 +136,8 @@ define <4 x i16> @umulfixsat(<4 x i16> %a) {
; CHECK-NEXT: shrl $16, %edx
; CHECK-NEXT: movl %edx, %esi
; CHECK-NEXT: shldw $1, %cx, %si
-; CHECK-NEXT: cmpl $32767, %edx # imm = 0x7FFF
-; CHECK-NEXT: cmoval %eax, %esi
+; CHECK-NEXT: cmpl $32768, %edx # imm = 0x8000
+; CHECK-NEXT: cmovael %eax, %esi
; CHECK-NEXT: pinsrw $3, %esi, %xmm1
; CHECK-NEXT: movdqa %xmm1, %xmm0
; CHECK-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/zext-sext.ll b/llvm/test/CodeGen/X86/zext-sext.ll
index 84096e3b6805d..95b93921f0253 100644
--- a/llvm/test/CodeGen/X86/zext-sext.ll
+++ b/llvm/test/CodeGen/X86/zext-sext.ll
@@ -23,10 +23,10 @@ define void @func([40 x i16]* %a, i32* %b, i16** %c, i64* %d) nounwind {
; CHECK-NEXT: cmpl $-8608074, %eax # imm = 0xFF7CA6B6
; CHECK-NEXT: movslq %eax, %rdi
; CHECK-NEXT: setl %dl
-; CHECK-NEXT: cmpl $2138875573, %eax # imm = 0x7F7CA6B5
+; CHECK-NEXT: cmpl $2138875574, %eax # imm = 0x7F7CA6B6
; CHECK-NEXT: movq %rdi, %r8
; CHECK-NEXT: leal -1(%rdx,%rdx), %edx
-; CHECK-NEXT: cmovlel %edx, %esi
+; CHECK-NEXT: cmovll %edx, %esi
; CHECK-NEXT: subq %rax, %r8
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl $1, %esi
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