[PATCH] D105206: [RISCV] Implement lround*/llround*/lrint*/llrint* with fcvt instruction with -fno-math-errno

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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These are fp->int conversions using either RMM or dynamic rounding modes.

The lround and lrint opcodes have a return type of either i32 or
i64 depending on sizeof(long) in the frontend which should follow
xlen. llround/llrint should always return i64 so we'll need a libcall
for those on rv32.

The frontend will only emit the intrinsics if -fno-math-errno is in
effect otherwise a libcall will be emitted which will not use
these ISD opcodes.

gcc also does this optimization.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D105206

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoD.td
  llvm/lib/Target/RISCV/RISCVInstrInfoF.td
  llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
  llvm/test/CodeGen/RISCV/double-intrinsics-rv32.ll
  llvm/test/CodeGen/RISCV/double-intrinsics-rv64.ll
  llvm/test/CodeGen/RISCV/double-intrinsics.ll
  llvm/test/CodeGen/RISCV/float-intrinsics-rv32.ll
  llvm/test/CodeGen/RISCV/float-intrinsics-rv64.ll
  llvm/test/CodeGen/RISCV/float-intrinsics.ll
  llvm/test/CodeGen/RISCV/half-intrinsics-rv32.ll
  llvm/test/CodeGen/RISCV/half-intrinsics-rv64.ll
  llvm/test/CodeGen/RISCV/half-intrinsics.ll

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