[PATCH] D105200: [AArch64][GlobalISel]Legalise some vector types for min/max

Jessica Paquette via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 30 09:40:28 PDT 2021


paquette accepted this revision.
paquette added a comment.
This revision is now accepted and ready to land.

LGTM with one nit on the testcase.



================
Comment at: llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir:2
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64-- -run-pass=legalizer %s -o - | FileCheck %s
+
----------------
Run the verifier?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105200/new/

https://reviews.llvm.org/D105200



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