[PATCH] D105009: [LSR] Handle case 1*reg => reg. PR50918
Max Kazantsev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 29 21:00:33 PDT 2021
mkazantsev added a comment.
In D105009#2849126 <https://reviews.llvm.org/D105009#2849126>, @huihuiz wrote:
> Another note on LSRInstance::GenerateReassociationsImpl() where 1*reg is created, eventually trigger this assertion.
>
> Looks like LSR is rewriting Formula
>
> reg((-64 + (32 * ((112 * (((trunc i32 undef to i8) * ((trunc i32 %tmp3 to i8) + {94,+,-3}<%bb1>)) + {-94,+,3}<%bb1>)) + (-56 * (trunc i32 %tmp3 to i8)) + {-110,+,88}<%bb1>)))) + 1*reg({0,+,-128}<%bb21>)
>
> into
>
> reg({0,+,-128}<%bb21>) + imm(256)
>
> I am not sure this rewrite is correct ?
Yes it is, because 1st register contains undef and therefore whole thing is undef.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105009/new/
https://reviews.llvm.org/D105009
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