[PATCH] D96681: [RISCV][LegalizeTypes] Try to expand BITREVERSE before promoting if the promoted BITREVERSE would expand anyway.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 29 11:04:05 PDT 2021


craig.topper added a comment.

In D96681#2846749 <https://reviews.llvm.org/D96681#2846749>, @kaz7 wrote:

> Is it possible to disable this expansion on a architecture which has 64 bit bitreverse and want to promote 32 bit bitreverse to 64 bit?
>
> VE expected promotion which generateed 2 instructions for 32 bit bitreverse previously.  But now,  bitreverse is expanded with bswap which generates 27 isntructions.
>
> I tried to fix it by VE implementation like trying to add isel patterns, but it doesn't work well.  If there is some kind option to avoid bswap expansion, please let me know.  Thanks!

I just commited 913229983633cd4c19b9e5534018f9a42e274b30 <https://reviews.llvm.org/rG913229983633cd4c19b9e5534018f9a42e274b30> which restores VE's previous codegen for i8 and i16 bitreverse. I restored bitreverse.ll to its previous state.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96681/new/

https://reviews.llvm.org/D96681



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