[PATCH] D105062: [AMDGPU] Reduce AGPR to AGPR copies with same source

Tue Jun 29 10:27:18 PDT 2021

rampitec added a comment.

In D105062#2845965 <https://reviews.llvm.org/D105062#2845965>, @vangthao wrote:

> This is an issue because the REG_SEQUENCE will be expanded into multiple AGPR copies during twoaddressinstruction pass.
>
>   %80:vgpr_32 = V_MOV_B32_e32 1123418112, implicit $exec
>   %81:agpr_32 = V_ACCVGPR_WRITE_B32_e64 killed %80:vgpr_32, implicit $exec
>   undef %70.sub0:areg_1024 = COPY %81:agpr_32
>   %70.sub1:areg_1024 = COPY %81:agpr_32
>   %70.sub2:areg_1024 = COPY %81:agpr_32
>   %70.sub3:areg_1024 = COPY %81:agpr_32
>   ...

Can we somehow catch it at this point? This seems to be a culprit.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105062/new/

https://reviews.llvm.org/D105062