[PATCH] D104989: [VPlan] Add VPReductionPHIRecipe (NFC).
Kerry McLaughlin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 28 10:00:21 PDT 2021
kmclaughlin added inline comments.
================
Comment at: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:4348
+ bool IsOrdered =
+ State.VF.isVector() && IsInLoopReductionPhi && PhiR->isOrdered();
----------------
Hi @fhahn, I recently created D104533 to fix ordered reductions where the VF = 1. After this change, the `State.VF.isVector()` check here (and in VPReductionPHIRecipe::execute) is no longer required.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D104989/new/
https://reviews.llvm.org/D104989
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