[PATCH] D105009: [LSR] Handle case 1*reg => reg. PR50918
Max Kazantsev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 28 02:53:59 PDT 2021
mkazantsev created this revision.
mkazantsev added reviewers: huihuiz, StephenTozer, hans, lebedev.ri, nikic, reames.
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This patch addresses assertion failure in case when the only found formula for LSR
is `1*reg => reg` which was supposed to be an impossible situation, however there
is a test that shows it is possible.
https://reviews.llvm.org/D105009
Files:
llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
llvm/test/Transforms/LoopStrengthReduce/pr50918.ll
Index: llvm/test/Transforms/LoopStrengthReduce/pr50918.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/LoopStrengthReduce/pr50918.ll
@@ -0,0 +1,41 @@
+; RUN: opt -S -loop-reduce < %s | FileCheck %s
+;
+; Make sure we don't fail an assertion here.
+
+target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @test() {
+; CHECK-LABEL: test
+bb:
+ br label %bb1
+
+bb1: ; preds = %bb12, %bb
+ %tmp2 = phi i64 [ 94, %bb ], [ %tmp20, %bb12 ]
+ %tmp3 = phi i32 [ -28407, %bb ], [ %tmp23, %bb12 ]
+ %tmp4 = trunc i64 %tmp2 to i32
+ %tmp5 = add i32 %tmp3, %tmp4
+ %tmp6 = mul i32 undef, %tmp5
+ %tmp7 = sub i32 %tmp6, %tmp5
+ %tmp8 = shl i32 %tmp7, 1
+ %tmp9 = add i32 %tmp8, %tmp3
+ %tmp10 = add i32 %tmp9, %tmp4
+ %tmp11 = shl i32 %tmp10, 1
+ br label %bb21
+
+bb12: ; preds = %bb21
+ %tmp13 = mul i32 %tmp22, -101
+ %tmp14 = add i32 %tmp22, 2
+ %tmp15 = add i32 %tmp14, %tmp13
+ %tmp16 = trunc i32 %tmp15 to i8
+ %tmp17 = shl i8 %tmp16, 5
+ %tmp18 = add i8 %tmp17, 64
+ %tmp19 = sext i8 %tmp18 to i32
+ %tmp20 = add nsw i64 %tmp2, -3
+ br label %bb1
+
+bb21: ; preds = %bb21, %bb1
+ %tmp22 = phi i32 [ %tmp11, %bb1 ], [ %tmp23, %bb21 ]
+ %tmp23 = add i32 %tmp22, 1
+ br i1 false, label %bb12, label %bb21
+}
Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -485,9 +485,6 @@
if (Scale != 1)
return true;
- if (Scale == 1 && BaseRegs.empty())
- return false;
-
const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg);
if (SAR && SAR->getLoop() == &L)
return true;
@@ -511,15 +508,14 @@
void Formula::canonicalize(const Loop &L) {
if (isCanonical(L))
return;
- // So far we did not need this case. This is easy to implement but it is
- // useless to maintain dead code. Beside it could hurt compile time.
- assert(!BaseRegs.empty() && "1*reg => reg, should not be needed.");
// Keep the invariant sum in BaseRegs and one of the variant sum in ScaledReg.
if (!ScaledReg) {
+ assert(!BaseRegs.empty() && "No base regs");
ScaledReg = BaseRegs.pop_back_val();
Scale = 1;
- }
+ } else if (BaseRegs.empty())
+ Scale = 1;
// If ScaledReg is an invariant with respect to L, find the reg from
// BaseRegs containing the recurrent expr related with Loop L. Swap the
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