[PATCH] D104316: [AMDGPU] Propagate LDS align into to instructions
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 23 10:24:31 PDT 2021
rampitec marked 3 inline comments as done.
rampitec added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp:346
+ }
+ if (auto *SI = dyn_cast<StoreInst>(U)) {
+ SI->setAlignment(std::max(A, SI->getAlign()));
----------------
foad wrote:
> foad wrote:
> > For StoreInst, AtomicRMWInst, AtomicCmpXchgInst and GetElementPtrInst you need to check that the use is actually the "address" operand of the instruction.
> Oh, I see you are already checking it for GetElementPtrInst.
None of AtomicRMW operators can use pointers. AtomicCmpXchgInst can.Actually I cannot come up with a test for GEP too. I think it is only possible if we start to process ConstantExpr here which is not handled right now.
Anyway, D104796 addresses this and Align == 1 case.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D104316/new/
https://reviews.llvm.org/D104316
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