[PATCH] D104581: [RISCV] Add DAG combine to detect opportunities to replace (i64 (any_extend (i32 X)) with sign_extend.

[Craig Topper via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd4f4a1ba626d: [RISCV] Add DAG combine to detect opportunities to replace (i64 (any_extend… (authored by craig.topper).

Changed prior to commit:
  https://reviews.llvm.org/D104581?vs=353129&id=354649#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104581/new/

https://reviews.llvm.org/D104581

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/aext-to-sext.ll
  llvm/test/CodeGen/RISCV/rv64zbb.ll

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