[PATCH] D104912: [AMDGPU] Select d16 stores even when sramecc is enabled

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
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The sramecc feature changes the behaviour of d16 loads so they do not
preserve the unused 16 bits of the result register, but it has no impact
on d16 stores, so we should make use of them even when the feature is
enabled.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D104912

Files:
  llvm/lib/Target/AMDGPU/BUFInstructions.td
  llvm/lib/Target/AMDGPU/DSInstructions.td
  llvm/lib/Target/AMDGPU/FLATInstructions.td
  llvm/test/CodeGen/AMDGPU/store-hi16.ll

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