[PATCH] D104827: [DebugInfo] Enforce implicit constraints on `distinct` MDNodes
Scott Linder via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 24 14:42:34 PDT 2021
scott.linder updated this revision to Diff 354362.
scott.linder added a comment.
Implement inline case in AssemblyWriter::printNamedMDNode based on UNIQUED-ness.
I'm not sure my overall approach to this patch is actually the best way to
proceed. The biggest issue is that DIArgList is more particular about where it
can appear, so most of this generic support for UNIQUED nodes is just dead code
for DIArgList. It still seems like having a lot of `if (isa<Foo>) ...;`
littered around the IR parser/printer, bitcode reader/writer, MIR
reader/writer, etc. to implement inline nodes is more error prone, and we still
need to fix the bug with `distinct` either way.
Does anyone have thoughts on what approach to take?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D104827/new/
https://reviews.llvm.org/D104827
Files:
llvm/docs/LangRef.rst
llvm/docs/SourceLevelDebugging.rst
llvm/include/llvm/AsmParser/LLParser.h
llvm/include/llvm/IR/Metadata.def
llvm/lib/AsmParser/LLParser.cpp
llvm/lib/Bitcode/Reader/MetadataLoader.cpp
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
llvm/lib/CodeGen/MIRParser/MIParser.cpp
llvm/lib/IR/AsmWriter.cpp
llvm/lib/IR/DebugInfoMetadata.cpp
llvm/lib/IR/LLVMContextImpl.cpp
llvm/lib/IR/LLVMContextImpl.h
llvm/lib/IR/Metadata.cpp
llvm/test/Assembler/invalid-diarglist-outside-function.ll
llvm/test/Assembler/invalid-diexpression-distinct.ll
llvm/test/Bitcode/DIExpression-is-distinct-upgrade.ll
llvm/test/Bitcode/DIExpression-is-distinct-upgrade.ll.bc
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