[PATCH] D104853: [X86] Add description of FXAM instruction

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D104853#2838943 <https://reviews.llvm.org/D104853#2838943>, @sepavloff wrote:

> In D104853#2838797 <https://reviews.llvm.org/D104853#2838797>, @craig.topper wrote:
>
>> FXAM appears to be two uops where FTST is one on modern Intel CPUs based on Agner Fog's data. Agner's data for some AMD CPUs shows ~20 cycles of latency.
>
> Could tuning scheduling for this instruction be subsequent work?

Yes, but that 20 cycle latency on some AMD CPUs is a little concerning. X87 tends to get more and more unoptimized in modern CPUs and I'm sure what instructions show up in code factors in to those design decisions. So using an X87 instruction that compilers haven't historically used could expose unexpected performance issues.


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