[PATCH] D104853: [X86] Add description of FXAM instruction

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

FXAM appears to be two uops where FTST is one on modern Intel CPUs based on Agner Fog's data. Agner's data for some AMD CPUs shows ~20 cycles of latency.

What do you intend to use this for?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D104853/new/

https://reviews.llvm.org/D104853