[PATCH] D79521: [RISCV] Add SiFive's interrupt modes

[Alex Bradbury via Phabricator via llvm-commits]

asb added a comment.

We haven't yet added vendor-specific extensions to upstream RISC-V LLVM. Given SiFive are active in the upstream community I think I'd look to see one of those contributors advocating for this being merged, and we may need to have a slightly broader conversation about what the policy / expectations should be for such extensions going forwards.


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https://reviews.llvm.org/D79521