[PATCH] D104822: [RISCV] Add vget/vset intrinsics for inserting and extracting between different lmuls.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: frasercrmck, rogfer01, kito-cheng, khchen, arcbbb, HsiangKai, evandro.
Herald added subscribers: StephenFan, vkmr, dexonsmith, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, niosHD, sabuasal, simoncook, johnrusso, rbar, asb.
craig.topper requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay.
Herald added a project: clang.

These allow getting a whole register from a larger lmul. Or
inserting a whole register into a larger lmul register. Fractional
lmuls are not supported as they would require a vslide.

Based on this update to the intrinsic doc
https://github.com/riscv/rvv-intrinsic-doc/pull/99


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D104822

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/test/CodeGen/RISCV/rvv-intrinsics/vget.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vset.c

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D104822.354090.patch
Type: text/x-patch
Size: 53217 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210623/5f08430d/attachment.bin>