[llvm] e6a3530 - [NFC][AArch64] Autogenerate assembly checklines in arm64-instruction-mix-remarks.ll

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2021-06-24T00:01:13+03:00
New Revision: e6a353061fe9d7b2d4a7d0941709faec4d4d63d3

URL: https://github.com/llvm/llvm-project/commit/e6a353061fe9d7b2d4a7d0941709faec4d4d63d3
DIFF: https://github.com/llvm/llvm-project/commit/e6a353061fe9d7b2d4a7d0941709faec4d4d63d3.diff

LOG: [NFC][AArch64] Autogenerate assembly checklines in arm64-instruction-mix-remarks.ll

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll b/llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll
index b722c3006588..233c0020f601 100644
--- a/llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll
@@ -1,14 +1,8 @@
-; RUN: llc -mtriple=arm64-apple-ios7.0 -pass-remarks-output=%t -pass-remarks=asm-printer -o - %s | FileCheck %s
-; RUN: FileCheck --input-file=%t --check-prefix=YAML %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
 
-; CHECK-LABEL: %entry
-; CHECK-NEXT:   ldr w8, [x0]
-; CHECK-NEXT:   mov w10, #16959
-; CHECK-NEXT:   movk w10, #15, lsl #16
-; CHECK-NEXT:   add w8, w8, w1
-; CHECK-NEXT:   add x9, x8, x2
-; CHECK-NEXT:   cmp x9, x10
-; CHECK-NEXT:   b.ne    LBB0_2
+; RUN: llc -mtriple=arm64-apple-ios7.0 -pass-remarks-output=%t -pass-remarks=asm-printer -o - %s
+; RUN: FileCheck --input-file=%t --check-prefix=YAML %s
 
 ; YAML:      Name:            InstructionMix
 ; YAML-NEXT: DebugLoc:        { File: arm64-instruction-mix-remarks.ll, Line: 10, Column: 10 }
@@ -22,11 +16,6 @@
 ; YAML:      - INST_movz:   '1'
 ; YAML:      - INST_subs:   '1'
 
-
-; CHECK-LABEL: %then
-; CHECK-NEXT:    mov w0, w8
-; CHECK-NEXT:    ret
-
 ; YAML:      Name:            InstructionMix
 ; YAML-NEXT: DebugLoc:        { File: arm64-instruction-mix-remarks.ll, Line: 20, Column: 20 }
 ; YAML-NEXT: Function:        foo
@@ -35,14 +24,6 @@
 ; YAML:        - INST_orr:   '1'
 ; YAML:        - INST_ret:   '1'
 
-; CHECK-LABEL: %else
-; CHECK-NEXT:    mul w8, w8, w1
-; CHECK-NEXT:    mov w9, #10
-; CHECK-NEXT:    mul w8, w8, w1
-; CHECK-NEXT:    str w9, [x0]
-; CHECK-NEXT:    mov w0, w8
-; CHECK-NEXT:    ret
-
 ; YAML:      Name:            InstructionMix
 ; YAML-NEXT: DebugLoc:        { File: arm64-instruction-mix-remarks.ll, Line: 30, Column: 30 }
 ; YAML-NEXT: Function:        foo
@@ -53,6 +34,25 @@
 ; YAML:       - INST_ret:    '1'
 ; YAML:       - INST_str:    '1'
 define i32 @foo(i32* %ptr, i32 %x, i64 %y) !dbg !3 {
+; CHECK-LABEL: foo:
+; CHECK:       ; %bb.0: ; %entry
+; CHECK-NEXT:    ldr w8, [x0]
+; CHECK-NEXT:    mov w10, #16959
+; CHECK-NEXT:    movk w10, #15, lsl #16
+; CHECK-NEXT:    add w8, w8, w1
+; CHECK-NEXT:    add x9, x8, x2
+; CHECK-NEXT:    cmp x9, x10
+; CHECK-NEXT:    b.ne LBB0_2
+; CHECK-NEXT:  ; %bb.1: ; %then
+; CHECK-NEXT:    mov w0, w8
+; CHECK-NEXT:    ret
+; CHECK-NEXT:  LBB0_2: ; %else
+; CHECK-NEXT:    mul w8, w8, w1
+; CHECK-NEXT:    mov w9, #10
+; CHECK-NEXT:    mul w8, w8, w1
+; CHECK-NEXT:    str w9, [x0]
+; CHECK-NEXT:    mov w0, w8
+; CHECK-NEXT:    ret
 entry:
   %l = load i32, i32* %ptr, !dbg !4
   %add = add i32 %l, %x, !dbg !4