[PATCH] D104722: [SVE] Added CodeGen support for inserting an element into a predicate vector

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 22 11:06:27 PDT 2021


efriedma added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/sve-insert-element.ll:372
+; CHECK-NEXT:    cmpne p0.d, p1/z, z0.d, #0
+; CHECK-NEXT:    ret
+  %res = insertelement <vscale x 2 x i1> %val, i1 %elt, i32 %idx
----------------
This looks messy, but I guess it's actually a surprisingly hard operation to implement in the general case. I guess you might be able to save an instruction or two here, but probably can't get it a lot shorter.

Could you include a couple testcases where idx and/or elt are constants, just to get an idea what that looks like?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104722/new/

https://reviews.llvm.org/D104722



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