[PATCH] D104727: [RISCV] Permit RVV stack offsets larger than 12 bits

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck created this revision.
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This patch teaches the compiler to generate code for large RVV scalable
components of stack offsets which don't fit into the 12-bit field of an
`ADDI` instruction. The previous behaviour was asserting on such large
values. The compiler can now materialize this amount into a temporary
register before continuing with the computation.

A test case for this scenario is included which also checks that the
temporary register used to materialize the amount doesn't require an
additional spill slot over what we're already reserving for RVV.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D104727

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir

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