[PATCH] D104675: [MCA] [In-order pipeline] Fix for 0 latency instruction causing assertion to fail.

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb accepted this revision.
andreadb added a comment.
This revision is now accepted and ready to land.

LGTM.

Thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104675/new/

https://reviews.llvm.org/D104675