[PATCH] D103800: [AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions

[Carl Ritson via Phabricator via llvm-commits]

critson marked 4 inline comments as done.
critson added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/MIMGInstructions.td:766
+                  !if(!or(!eq(dw, 3), !eq(dw, 5)),
+                      !add(dw, 0),
+                      !if(!or(!eq(dw, 6), !eq(dw, 7)), lhs.Min, !add(dw, 1)))>,
----------------
foad wrote:
> This is just "dw"
A leftover from testing :-)


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1938
+  if (BitWidth <= 224)
+    return &AMDGPU::AReg_192RegClass;
   if (BitWidth <= 256)
----------------
dp wrote:
> typo
Thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103800/new/

https://reviews.llvm.org/D103800