[llvm] 9699442 - RegisterCoalescer: Fix iterating through use operands.

Hendrik Greving via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 21 09:18:10 PDT 2021


Author: Hendrik Greving
Date: 2021-06-21T09:17:54-07:00
New Revision: 96994427f2426e895c301be4e6002dc0ba3c4890

URL: https://github.com/llvm/llvm-project/commit/96994427f2426e895c301be4e6002dc0ba3c4890
DIFF: https://github.com/llvm/llvm-project/commit/96994427f2426e895c301be4e6002dc0ba3c4890.diff

LOG: RegisterCoalescer: Fix iterating through use operands.

Fixes a minor bug when trying to iterate through use operands when
updating debug use operands.

Extends a test to include above.

Differential Revision: https://reviews.llvm.org/D104576

Added: 
    

Modified: 
    llvm/lib/CodeGen/RegisterCoalescer.cpp
    llvm/test/DebugInfo/MIR/X86/regcoalescer.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index dd5e490dbea56..0248115dd991e 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -1557,7 +1557,9 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
   // If the virtual SrcReg is completely eliminated, update all DBG_VALUEs
   // to describe DstReg instead.
   if (MRI->use_nodbg_empty(SrcReg)) {
-    for (MachineOperand &UseMO : MRI->use_operands(SrcReg)) {
+    for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(SrcReg);
+         UI != MRI->use_end();) {
+      MachineOperand &UseMO = *UI++;
       MachineInstr *UseMI = UseMO.getParent();
       if (UseMI->isDebugValue()) {
         if (Register::isPhysicalRegister(DstReg))

diff  --git a/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir b/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir
index 613aea7b295d9..581375b6b2875 100644
--- a/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir
+++ b/llvm/test/DebugInfo/MIR/X86/regcoalescer.mir
@@ -27,9 +27,10 @@
   !16 = !{!7}
   !17 = !{!18}
   !18 = !DILocalVariable(name: "bazinga", scope: !14, file: !1, line: 13, type: !7)
-  !19 = !DILocation(line: 14, column: 11, scope: !14)
-  !20 = !DILocation(line: 13, column: 7, scope: !14)
-  !21 = !DILocation(line: 16, column: 3, scope: !14)
+  !19 = !DILocalVariable(name: "bazinga2", scope: !14, file: !1, line: 13, type: !7)
+  !20 = !DILocation(line: 14, column: 11, scope: !14)
+  !21 = !DILocation(line: 13, column: 7, scope: !14)
+  !22 = !DILocation(line: 16, column: 3, scope: !14)
 
 ...
 ---
@@ -39,12 +40,14 @@ registers:
   - { id: 0, class: gr32, preferred-register: '' }
 body:             |
   bb.0.entry:
-    %0 = MOV32r0 implicit-def dead $eflags, debug-location !19
-    DBG_VALUE %0, _, !18, !DIExpression(), debug-location !20
-    $eax = COPY killed %0, debug-location !21
-    RET 0, killed $eax, debug-location !21
+    %0 = MOV32r0 implicit-def dead $eflags, debug-location !20
+    DBG_VALUE %0, _, !18, !DIExpression(), debug-location !21
+    DBG_VALUE %0, _, !19, !DIExpression(), debug-location !22
+    $eax = COPY killed %0, debug-location !22
+    RET 0, killed $eax, debug-location !22
 
 ...
 
 # CHECK: $eax = MOV32r0
 # CHECK-NEXT: DBG_VALUE $eax
+# CHECK-NEXT: DBG_VALUE $eax


        


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