[PATCH] D104576: RegisterCoalescer: Fix iterating through use operands.

Hendrik Greving via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 18 15:21:59 PDT 2021


hgreving created this revision.
Herald added subscribers: tpr, hiraditya, qcolombet, MatzeB.
hgreving requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Fixes a minor bug when trying to iterate through use operands when
updating debug use operands.

Extends a test to include above.


https://reviews.llvm.org/D104576

Files:
  llvm/lib/CodeGen/RegisterCoalescer.cpp
  llvm/test/DebugInfo/MIR/X86/regcoalescer.mir


Index: llvm/test/DebugInfo/MIR/X86/regcoalescer.mir
===================================================================
--- llvm/test/DebugInfo/MIR/X86/regcoalescer.mir
+++ llvm/test/DebugInfo/MIR/X86/regcoalescer.mir
@@ -27,9 +27,10 @@
   !16 = !{!7}
   !17 = !{!18}
   !18 = !DILocalVariable(name: "bazinga", scope: !14, file: !1, line: 13, type: !7)
-  !19 = !DILocation(line: 14, column: 11, scope: !14)
-  !20 = !DILocation(line: 13, column: 7, scope: !14)
-  !21 = !DILocation(line: 16, column: 3, scope: !14)
+  !19 = !DILocalVariable(name: "bazinga2", scope: !14, file: !1, line: 13, type: !7)
+  !20 = !DILocation(line: 14, column: 11, scope: !14)
+  !21 = !DILocation(line: 13, column: 7, scope: !14)
+  !22 = !DILocation(line: 16, column: 3, scope: !14)
 
 ...
 ---
@@ -39,10 +40,11 @@
   - { id: 0, class: gr32, preferred-register: '' }
 body:             |
   bb.0.entry:
-    %0 = MOV32r0 implicit-def dead $eflags, debug-location !19
-    DBG_VALUE %0, _, !18, !DIExpression(), debug-location !20
-    $eax = COPY killed %0, debug-location !21
-    RET 0, killed $eax, debug-location !21
+    %0 = MOV32r0 implicit-def dead $eflags, debug-location !20
+    DBG_VALUE %0, _, !18, !DIExpression(), debug-location !21
+    DBG_VALUE %0, _, !19, !DIExpression(), debug-location !22
+    $eax = COPY killed %0, debug-location !22
+    RET 0, killed $eax, debug-location !22
 
 ...
 
Index: llvm/lib/CodeGen/RegisterCoalescer.cpp
===================================================================
--- llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -1557,13 +1557,16 @@
   // If the virtual SrcReg is completely eliminated, update all DBG_VALUEs
   // to describe DstReg instead.
   if (MRI->use_nodbg_empty(SrcReg)) {
-    for (MachineOperand &UseMO : MRI->use_operands(SrcReg)) {
-      MachineInstr *UseMI = UseMO.getParent();
+    SmallVector<MachineOperand *> UseOperands;
+    for (MachineOperand &UseMO : MRI->use_operands(SrcReg))
+      UseOperands.push_back(&UseMO);
+    for (MachineOperand *UseMO : UseOperands) {
+      MachineInstr *UseMI = UseMO->getParent();
       if (UseMI->isDebugValue()) {
         if (Register::isPhysicalRegister(DstReg))
-          UseMO.substPhysReg(DstReg, *TRI);
+          UseMO->substPhysReg(DstReg, *TRI);
         else
-          UseMO.setReg(DstReg);
+          UseMO->setReg(DstReg);
         // Move the debug value directly after the def of the rematerialized
         // value in DstReg.
         MBB->splice(std::next(NewMI.getIterator()), UseMI->getParent(), UseMI);
@@ -1576,8 +1579,11 @@
     return true;
 
   unsigned NumCopyUses = 0;
-  for (MachineOperand &UseMO : MRI->use_nodbg_operands(SrcReg)) {
-    if (UseMO.getParent()->isCopyLike())
+  SmallVector<MachineOperand *> UseOperands;
+  for (MachineOperand &UseMO : MRI->use_nodbg_operands(SrcReg))
+    UseOperands.push_back(&UseMO);
+  for (MachineOperand *UseMO : UseOperands) {
+    if (UseMO->getParent()->isCopyLike())
       NumCopyUses++;
   }
   if (NumCopyUses < LateRematUpdateThreshold) {


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