[PATCH] D104522: [InstrRef][AArch64][3/4] Recover variables from aarch64 load/store combiner

Jeremy Morse via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 18 04:56:52 PDT 2021


jmorse created this revision.
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This pass combines several load or store instructions into a single instruction that defines several registers at a time. With the instruction referencing model of tracking variable values for debug-info, we need to record that this optimisation took place, mapping the instruction numbers of any optimised-out loads onto the relevant operands of the new LDP instruction. Stores should not be labelled.

The test added borrows functions from other aarch64 tests. Right now, the "case4" function produces a LDPXpost instruction that I'm not quite sure what to do with. That's left unlabelled (meaning variable locations are safely dropped) to be implemented as a future exercise.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D104522

Files:
  llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  llvm/test/DebugInfo/MIR/AArch64/ldst-merge-instr-ref.mir

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