[PATCH] D104396: [AIX] Use VSSRC/VSFRC Register classes for f32/f64 callee arguments on P8 and above
Zarko Todorovski via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 17 11:22:50 PDT 2021
ZarkoCA marked an inline comment as done.
ZarkoCA added inline comments.
================
Comment at: llvm/test/CodeGen/PowerPC/aix-p8vector-liveins.ll:5
+; RUN: -debug-only=isel -o - 2>&1 %s | FileCheck %s --check-prefix=POWR7
+
+define float @vssr(float %a, float %b, float %c, float %d, float %e) {
----------------
qiucf wrote:
> Maybe better to pre-commit this file? (or at least generate diff after staging it)
I could do that if you feel strongly about it but I'd like the test case to be associated with this patch since we already have many AIX calling convention test cases. I don't think adding it alone add any value besides what this patch will show and in that case, in my opinion, it's better to have in the patch.
I did add a RUN step for running with `-mcpu=pwr8` but with `-power8-vector` to show try and address your concern in some way. Does that work?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D104396/new/
https://reviews.llvm.org/D104396
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