[llvm] 5b1079f - [InstCombine][x86] add tests for complex vector shift value tracking; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2021-06-17T12:39:16-04:00
New Revision: 5b1079f6411b7d978550c6bf37e87674d137f1c4

URL: https://github.com/llvm/llvm-project/commit/5b1079f6411b7d978550c6bf37e87674d137f1c4
DIFF: https://github.com/llvm/llvm-project/commit/5b1079f6411b7d978550c6bf37e87674d137f1c4.diff

LOG: [InstCombine][x86] add tests for complex vector shift value tracking; NFC

https://llvm.org/PR50123

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll b/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll
index 5f710e51e3899..73fe52f8c3284 100644
--- a/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll
+++ b/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll
@@ -2762,6 +2762,40 @@ define <2 x i64> @sse2_psll_q_128_masked(<2 x i64> %v, <2 x i64> %a) {
   ret <2 x i64> %2
 }
 
+define <2 x i64> @sse2_psll_q_128_masked_bitcast(<2 x i64> %v, <2 x i64> %a) {
+; CHECK-LABEL: @sse2_psll_q_128_masked_bitcast(
+; CHECK-NEXT:    [[B:%.*]] = bitcast <2 x i64> [[A:%.*]] to <4 x i32>
+; CHECK-NEXT:    [[M:%.*]] = and <4 x i32> [[B]], <i32 31, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT:    [[I:%.*]] = insertelement <4 x i32> [[M]], i32 0, i32 1
+; CHECK-NEXT:    [[SHAMT:%.*]] = bitcast <4 x i32> [[I]] to <2 x i64>
+; CHECK-NEXT:    [[R:%.*]] = tail call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> [[V:%.*]], <2 x i64> [[SHAMT]])
+; CHECK-NEXT:    ret <2 x i64> [[R]]
+;
+  %b = bitcast <2 x i64> %a to <4 x i32>
+  %m = and <4 x i32> %b, <i32 31, i32 poison, i32 poison, i32 poison>
+  %i = insertelement <4 x i32> %m, i32 0, i32 1
+  %shamt = bitcast <4 x i32> %i to <2 x i64>
+  %r = tail call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> %v, <2 x i64> %shamt) #2
+  ret <2 x i64> %r
+}
+
+define <2 x i64> @sse2_psll_q_128_masked_bitcast_overshift(<2 x i64> %v, <2 x i64> %a) {
+; CHECK-LABEL: @sse2_psll_q_128_masked_bitcast_overshift(
+; CHECK-NEXT:    [[B:%.*]] = bitcast <2 x i64> [[A:%.*]] to <4 x i32>
+; CHECK-NEXT:    [[M:%.*]] = and <4 x i32> [[B]], <i32 31, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT:    [[I:%.*]] = insertelement <4 x i32> [[M]], i32 1, i32 1
+; CHECK-NEXT:    [[SHAMT:%.*]] = bitcast <4 x i32> [[I]] to <2 x i64>
+; CHECK-NEXT:    [[R:%.*]] = tail call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> [[V:%.*]], <2 x i64> [[SHAMT]])
+; CHECK-NEXT:    ret <2 x i64> [[R]]
+;
+  %b = bitcast <2 x i64> %a to <4 x i32>
+  %m = and <4 x i32> %b, <i32 31, i32 poison, i32 poison, i32 poison>
+  %i = insertelement <4 x i32> %m, i32 1, i32 1
+  %shamt = bitcast <4 x i32> %i to <2 x i64>
+  %r = tail call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> %v, <2 x i64> %shamt) #2
+  ret <2 x i64> %r
+}
+
 define <16 x i16> @avx2_psll_w_256_masked(<16 x i16> %v, <8 x i16> %a) {
 ; CHECK-LABEL: @avx2_psll_w_256_masked(
 ; CHECK-NEXT:    [[TMP1:%.*]] = and <8 x i16> [[A:%.*]], <i16 15, i16 poison, i16 poison, i16 poison, i16 poison, i16 poison, i16 poison, i16 poison>