[PATCH] D104427: [amdgpu] Improve the from f32 to i64.

[Michael Liao via Phabricator via llvm-commits]

hliao added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2614
+  SDValue Sign;
+  if (SrcVT == MVT::f32) {
+    // However, a 32-bit floating point number has only 23 bits mantissa and
----------------
foad wrote:
> Only do this if `Signed`?
I need to verify that through the OCL compliance test. Even though out-of-range conversion has undefined behavior, I need to double-check that.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104427/new/

https://reviews.llvm.org/D104427