[PATCH] D104451: [GlobalISel] NFC: Change LLT::vector to take ElementCount.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen created this revision.
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This also adds new interfaces for the fixed- and scalable case:

- LLT::fixed_vector
- LLT::scalable_vector

The strategy for migrating to the new interfaces was as follows:

- If the new LLT is a (modified) clone of another LLT, taking the same number of elements, then use LLT::vector(OtherTy.getElementCount()) or if the number of elements is halfed/doubled, it uses .divideCoefficientBy(2) or operator*. That is because there is no reason to specifically restrict the types to 'fixed_vector'.
- If the algorithm works on the number of elements (as unsigned), then just use fixed_vector. This will need to be fixed up in the future when modifying the algorithm to also work for scalable vectors, and will need then need additional tests to confirm the behaviour works the same for scalable vectors.
- If the test used the '/*Scalable=*/true` flag of LLT::vector, then this is replaced by LLT::scalable_vector.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D104451

Files:
  llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
  llvm/include/llvm/Support/LowLevelTypeImpl.h
  llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
  llvm/lib/CodeGen/GlobalISel/LegalizeMutations.cpp
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/lib/CodeGen/GlobalISel/Utils.cpp
  llvm/lib/CodeGen/LowLevelType.cpp
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
  llvm/lib/Target/X86/X86LegalizerInfo.cpp
  llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
  llvm/unittests/CodeGen/GlobalISel/GISelUtilsTest.cpp
  llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
  llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
  llvm/unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp
  llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
  llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
  llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
  llvm/unittests/CodeGen/LowLevelTypeTest.cpp
  llvm/utils/TableGen/GlobalISelEmitter.cpp

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